AcoSail/kernel_optimize_test
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kernel_optimize_test/include/asm-sparc64/backoff.h

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[SPARC64]: Implement atomic backoff. When the cpu count is high and contention hits an atomic object, the processors can synchronize such that some cpus continually get knocked out and cannot complete the atomic update. So implement an exponential backoff when SMP. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-10-16 07:41:44 +08:00
#ifndef _SPARC64_BACKOFF_H
#define _SPARC64_BACKOFF_H
#define BACKOFF_LIMIT (4 * 1024)
#ifdef CONFIG_SMP
#define BACKOFF_SETUP(reg) \
mov 1, reg
#define BACKOFF_SPIN(reg, tmp, label) \
mov reg, tmp; \
88: brnz,pt tmp, 88b; \
sub tmp, 1, tmp; \
cmp reg, BACKOFF_LIMIT; \
bg,pn %xcc, label; \
nop; \
ba,pt %xcc, label; \
sllx reg, 1, reg;
#else
#define BACKOFF_SETUP(reg)
[SPARC64]: Fix BACKOFF_SPIN on non-SMP. It can't be just empty, it has to at least branch back to 'label'. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-10-27 15:23:22 +08:00
#define BACKOFF_SPIN(reg, tmp, label) \
ba,pt %xcc, label; \
nop;
[SPARC64]: Implement atomic backoff. When the cpu count is high and contention hits an atomic object, the processors can synchronize such that some cpus continually get knocked out and cannot complete the atomic update. So implement an exponential backoff when SMP. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-10-16 07:41:44 +08:00
#endif
#endif /* _SPARC64_BACKOFF_H */
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