2013-10-25 03:30:15 +08:00
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/*
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* Copyright (C) 2013 ARM Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef __ASM_CPU_OPS_H
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#define __ASM_CPU_OPS_H
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#include <linux/init.h>
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#include <linux/threads.h>
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struct device_node;
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arm64: factor out spin-table boot method
The arm64 kernel has an internal holding pen, which is necessary for
some systems where we can't bring CPUs online individually and must hold
multiple CPUs in a safe area until the kernel is able to handle them.
The current SMP infrastructure for arm64 is closely coupled to this
holding pen, and alternative boot methods must launch CPUs into the pen,
where they sit before they are launched into the kernel proper.
With PSCI (and possibly other future boot methods), we can bring CPUs
online individually, and need not perform the secondary_holding_pen
dance. Instead, this patch factors the holding pen management code out
to the spin-table boot method code, as it is the only boot method
requiring the pen.
A new entry point for secondaries, secondary_entry is added for other
boot methods to use, which bypasses the holding pen and its associated
overhead when bringing CPUs online. The smp.pen.text section is also
removed, as the pen can live in head.text without problem.
The cpu_operations structure is extended with two new functions,
cpu_boot and cpu_postboot, for bringing a cpu into the kernel and
performing any post-boot cleanup required by a bootmethod (e.g.
resetting the secondary_holding_pen_release to INVALID_HWID).
Documentation is added for cpu_operations.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2013-10-25 03:30:16 +08:00
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/**
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* struct cpu_operations - Callback operations for hotplugging CPUs.
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*
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* @name: Name of the property as appears in a devicetree cpu node's
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* enable-method property.
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* @cpu_init: Reads any data necessary for a specific enable-method from the
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* devicetree, for a given cpu node and proposed logical id.
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* @cpu_prepare: Early one-time preparation step for a cpu. If there is a
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* mechanism for doing so, tests whether it is possible to boot
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* the given CPU.
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* @cpu_boot: Boots a cpu into the kernel.
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* @cpu_postboot: Optionally, perform any post-boot cleanup or necesary
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* synchronisation. Called from the cpu being booted.
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2013-10-25 03:30:18 +08:00
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* @cpu_disable: Prepares a cpu to die. May fail for some mechanism-specific
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* reason, which will cause the hot unplug to be aborted. Called
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* from the cpu to be killed.
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* @cpu_die: Makes a cpu leave the kernel. Must not fail. Called from the
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* cpu being killed.
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arm64: factor out spin-table boot method
The arm64 kernel has an internal holding pen, which is necessary for
some systems where we can't bring CPUs online individually and must hold
multiple CPUs in a safe area until the kernel is able to handle them.
The current SMP infrastructure for arm64 is closely coupled to this
holding pen, and alternative boot methods must launch CPUs into the pen,
where they sit before they are launched into the kernel proper.
With PSCI (and possibly other future boot methods), we can bring CPUs
online individually, and need not perform the secondary_holding_pen
dance. Instead, this patch factors the holding pen management code out
to the spin-table boot method code, as it is the only boot method
requiring the pen.
A new entry point for secondaries, secondary_entry is added for other
boot methods to use, which bypasses the holding pen and its associated
overhead when bringing CPUs online. The smp.pen.text section is also
removed, as the pen can live in head.text without problem.
The cpu_operations structure is extended with two new functions,
cpu_boot and cpu_postboot, for bringing a cpu into the kernel and
performing any post-boot cleanup required by a bootmethod (e.g.
resetting the secondary_holding_pen_release to INVALID_HWID).
Documentation is added for cpu_operations.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2013-10-25 03:30:16 +08:00
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*/
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2013-10-25 03:30:15 +08:00
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struct cpu_operations {
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const char *name;
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int (*cpu_init)(struct device_node *, unsigned int);
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int (*cpu_prepare)(unsigned int);
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arm64: factor out spin-table boot method
The arm64 kernel has an internal holding pen, which is necessary for
some systems where we can't bring CPUs online individually and must hold
multiple CPUs in a safe area until the kernel is able to handle them.
The current SMP infrastructure for arm64 is closely coupled to this
holding pen, and alternative boot methods must launch CPUs into the pen,
where they sit before they are launched into the kernel proper.
With PSCI (and possibly other future boot methods), we can bring CPUs
online individually, and need not perform the secondary_holding_pen
dance. Instead, this patch factors the holding pen management code out
to the spin-table boot method code, as it is the only boot method
requiring the pen.
A new entry point for secondaries, secondary_entry is added for other
boot methods to use, which bypasses the holding pen and its associated
overhead when bringing CPUs online. The smp.pen.text section is also
removed, as the pen can live in head.text without problem.
The cpu_operations structure is extended with two new functions,
cpu_boot and cpu_postboot, for bringing a cpu into the kernel and
performing any post-boot cleanup required by a bootmethod (e.g.
resetting the secondary_holding_pen_release to INVALID_HWID).
Documentation is added for cpu_operations.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2013-10-25 03:30:16 +08:00
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int (*cpu_boot)(unsigned int);
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void (*cpu_postboot)(void);
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2013-10-25 03:30:18 +08:00
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#ifdef CONFIG_HOTPLUG_CPU
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int (*cpu_disable)(unsigned int cpu);
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void (*cpu_die)(unsigned int cpu);
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#endif
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2013-10-25 03:30:15 +08:00
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};
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extern const struct cpu_operations *cpu_ops[NR_CPUS];
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2013-10-25 03:30:17 +08:00
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extern int __init cpu_read_ops(struct device_node *dn, int cpu);
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extern void __init cpu_read_bootcpu_ops(void);
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2013-10-25 03:30:15 +08:00
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#endif /* ifndef __ASM_CPU_OPS_H */
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