forked from luck/tmp_suning_uos_patched
272 lines
7.4 KiB
C
272 lines
7.4 KiB
C
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/*
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* arch/v850/kernel/gbus_int.c -- Midas labs GBUS interrupt support
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*
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* Copyright (C) 2001,02,03 NEC Electronics Corporation
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* Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org>
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*
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* This file is subject to the terms and conditions of the GNU General
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* Public License. See the file COPYING in the main directory of this
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* archive for more details.
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*
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* Written by Miles Bader <miles@gnu.org>
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*/
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#include <linux/types.h>
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#include <linux/init.h>
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#include <linux/irq.h>
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#include <linux/interrupt.h>
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#include <linux/signal.h>
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#include <asm/machdep.h>
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/* The number of shared GINT interrupts. */
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#define NUM_GINTS 4
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/* For each GINT interrupt, how many GBUS interrupts are using it. */
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static unsigned gint_num_active_irqs[NUM_GINTS] = { 0 };
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/* A table of GINTn interrupts we actually use.
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Note that we don't use GINT0 because all the boards we support treat it
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specially. */
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struct used_gint {
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unsigned gint;
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unsigned priority;
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} used_gint[] = {
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{ 1, GBUS_INT_PRIORITY_HIGH },
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{ 3, GBUS_INT_PRIORITY_LOW }
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};
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#define NUM_USED_GINTS (sizeof used_gint / sizeof used_gint[0])
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/* A table of which GINT is used by each GBUS interrupts (they are
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assigned based on priority). */
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static unsigned char gbus_int_gint[IRQ_GBUS_INT_NUM];
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/* Interrupt enabling/disabling. */
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/* Enable interrupt handling for interrupt IRQ. */
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void gbus_int_enable_irq (unsigned irq)
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{
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unsigned gint = gbus_int_gint[irq - GBUS_INT_BASE_IRQ];
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GBUS_INT_ENABLE (GBUS_INT_IRQ_WORD(irq), gint)
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|= GBUS_INT_IRQ_MASK (irq);
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}
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/* Disable interrupt handling for interrupt IRQ. Note that any
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interrupts received while disabled will be delivered once the
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interrupt is enabled again, unless they are explicitly cleared using
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`gbus_int_clear_pending_irq'. */
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void gbus_int_disable_irq (unsigned irq)
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{
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unsigned gint = gbus_int_gint[irq - GBUS_INT_BASE_IRQ];
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GBUS_INT_ENABLE (GBUS_INT_IRQ_WORD(irq), gint)
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&= ~GBUS_INT_IRQ_MASK (irq);
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}
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/* Return true if interrupt handling for interrupt IRQ is enabled. */
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int gbus_int_irq_enabled (unsigned irq)
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{
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unsigned gint = gbus_int_gint[irq - GBUS_INT_BASE_IRQ];
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return (GBUS_INT_ENABLE (GBUS_INT_IRQ_WORD(irq), gint)
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& GBUS_INT_IRQ_MASK(irq));
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}
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/* Disable all GBUS irqs. */
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void gbus_int_disable_irqs ()
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{
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unsigned w, n;
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for (w = 0; w < GBUS_INT_NUM_WORDS; w++)
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for (n = 0; n < IRQ_GINT_NUM; n++)
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GBUS_INT_ENABLE (w, n) = 0;
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}
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/* Clear any pending interrupts for IRQ. */
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void gbus_int_clear_pending_irq (unsigned irq)
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{
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GBUS_INT_CLEAR (GBUS_INT_IRQ_WORD(irq)) = GBUS_INT_IRQ_MASK (irq);
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}
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/* Return true if interrupt IRQ is pending (but disabled). */
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int gbus_int_irq_pending (unsigned irq)
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{
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return (GBUS_INT_STATUS (GBUS_INT_IRQ_WORD(irq))
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& GBUS_INT_IRQ_MASK(irq));
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}
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/* Delegating interrupts. */
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/* Handle a shared GINT interrupt by passing to the appropriate GBUS
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interrupt handler. */
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static irqreturn_t gbus_int_handle_irq (int irq, void *dev_id,
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struct pt_regs *regs)
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{
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unsigned w;
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irqreturn_t rval = IRQ_NONE;
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unsigned gint = irq - IRQ_GINT (0);
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for (w = 0; w < GBUS_INT_NUM_WORDS; w++) {
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unsigned status = GBUS_INT_STATUS (w);
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unsigned enable = GBUS_INT_ENABLE (w, gint);
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/* Only pay attention to enabled interrupts. */
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status &= enable;
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if (status) {
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irq = IRQ_GBUS_INT (w * GBUS_INT_BITS_PER_WORD);
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do {
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/* There's an active interrupt in word
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W, find out which one, and call its
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handler. */
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while (! (status & 0x1)) {
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irq++;
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status >>= 1;
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}
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status &= ~0x1;
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/* Recursively call handle_irq to handle it. */
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handle_irq (irq, regs);
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rval = IRQ_HANDLED;
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} while (status);
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}
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}
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/* Toggle the `all enable' bit back and forth, which should cause
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another edge transition if there are any other interrupts
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still pending, and so result in another CPU interrupt. */
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GBUS_INT_ENABLE (0, gint) &= ~0x1;
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GBUS_INT_ENABLE (0, gint) |= 0x1;
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return rval;
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}
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/* Initialize GBUS interrupt sources. */
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static void irq_nop (unsigned irq) { }
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static unsigned gbus_int_startup_irq (unsigned irq)
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{
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unsigned gint = gbus_int_gint[irq - GBUS_INT_BASE_IRQ];
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if (gint_num_active_irqs[gint] == 0) {
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/* First enable the CPU interrupt. */
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int rval =
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request_irq (IRQ_GINT(gint), gbus_int_handle_irq,
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SA_INTERRUPT,
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"gbus_int_handler",
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&gint_num_active_irqs[gint]);
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if (rval != 0)
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return rval;
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}
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gint_num_active_irqs[gint]++;
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gbus_int_clear_pending_irq (irq);
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gbus_int_enable_irq (irq);
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return 0;
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}
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static void gbus_int_shutdown_irq (unsigned irq)
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{
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unsigned gint = gbus_int_gint[irq - GBUS_INT_BASE_IRQ];
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gbus_int_disable_irq (irq);
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if (--gint_num_active_irqs[gint] == 0)
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/* Disable the CPU interrupt. */
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free_irq (IRQ_GINT(gint), &gint_num_active_irqs[gint]);
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}
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/* Initialize HW_IRQ_TYPES for INTC-controlled irqs described in array
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INITS (which is terminated by an entry with the name field == 0). */
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void __init gbus_int_init_irq_types (struct gbus_int_irq_init *inits,
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struct hw_interrupt_type *hw_irq_types)
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{
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struct gbus_int_irq_init *init;
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for (init = inits; init->name; init++) {
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unsigned i;
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struct hw_interrupt_type *hwit = hw_irq_types++;
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hwit->typename = init->name;
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hwit->startup = gbus_int_startup_irq;
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hwit->shutdown = gbus_int_shutdown_irq;
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hwit->enable = gbus_int_enable_irq;
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hwit->disable = gbus_int_disable_irq;
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hwit->ack = irq_nop;
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hwit->end = irq_nop;
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/* Initialize kernel IRQ infrastructure for this interrupt. */
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init_irq_handlers(init->base, init->num, init->interval, hwit);
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/* Set the interrupt priorities. */
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for (i = 0; i < init->num; i++) {
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unsigned j;
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for (j = 0; j < NUM_USED_GINTS; j++)
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if (used_gint[j].priority > init->priority)
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break;
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/* Wherever we stopped looking is one past the
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GINT we want. */
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gbus_int_gint[init->base + i * init->interval
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- GBUS_INT_BASE_IRQ]
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= used_gint[j > 0 ? j - 1 : 0].gint;
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}
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}
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}
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/* Initialize IRQS. */
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/* Chip interrupts (GINTn) shared among GBUS interrupts. */
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static struct hw_interrupt_type gint_hw_itypes[NUM_USED_GINTS];
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/* GBUS interrupts themselves. */
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struct gbus_int_irq_init gbus_irq_inits[] __initdata = {
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/* First set defaults. */
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{ "GBUS_INT", IRQ_GBUS_INT(0), IRQ_GBUS_INT_NUM, 1, 6},
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{ 0 }
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};
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#define NUM_GBUS_IRQ_INITS \
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((sizeof gbus_irq_inits / sizeof gbus_irq_inits[0]) - 1)
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static struct hw_interrupt_type gbus_hw_itypes[NUM_GBUS_IRQ_INITS];
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/* Initialize GBUS interrupts. */
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void __init gbus_int_init_irqs (void)
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{
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unsigned i;
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/* First initialize the shared gint interrupts. */
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for (i = 0; i < NUM_USED_GINTS; i++) {
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unsigned gint = used_gint[i].gint;
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struct v850e_intc_irq_init gint_irq_init[2];
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/* We initialize one GINT interrupt at a time. */
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gint_irq_init[0].name = "GINT";
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gint_irq_init[0].base = IRQ_GINT (gint);
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gint_irq_init[0].num = 1;
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gint_irq_init[0].interval = 1;
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gint_irq_init[0].priority = used_gint[i].priority;
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gint_irq_init[1].name = 0; /* Terminate the vector. */
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v850e_intc_init_irq_types (gint_irq_init, gint_hw_itypes);
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}
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/* Then the GBUS interrupts. */
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gbus_int_disable_irqs ();
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gbus_int_init_irq_types (gbus_irq_inits, gbus_hw_itypes);
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/* Turn on the `all enable' bits, which are ANDed with
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individual interrupt enable bits; we only want to bother with
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the latter. They are the first bit in the first word of each
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interrupt-enable area. */
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for (i = 0; i < NUM_USED_GINTS; i++)
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GBUS_INT_ENABLE (0, used_gint[i].gint) = 0x1;
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}
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