2019-06-04 16:11:33 +08:00
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/* SPDX-License-Identifier: GPL-2.0-only */
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2014-07-11 19:19:06 +08:00
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/*
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* Copyright (C) 2014 NVIDIA Corporation
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*/
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#ifndef __SOC_TEGRA_PM_H__
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#define __SOC_TEGRA_PM_H__
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enum tegra_suspend_mode {
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TEGRA_SUSPEND_NONE = 0,
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TEGRA_SUSPEND_LP2, /* CPU voltage off */
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TEGRA_SUSPEND_LP1, /* CPU voltage off, DRAM self-refresh */
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TEGRA_SUSPEND_LP0, /* CPU + core voltage off, DRAM self-refresh */
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TEGRA_MAX_SUSPEND_MODE,
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};
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2014-12-10 06:36:50 +08:00
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#if defined(CONFIG_PM_SLEEP) && defined(CONFIG_ARM)
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2014-07-11 19:19:06 +08:00
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enum tegra_suspend_mode
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tegra_pm_validate_suspend_mode(enum tegra_suspend_mode mode);
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/* low-level resume entry point */
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void tegra_resume(void);
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#else
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static inline enum tegra_suspend_mode
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tegra_pm_validate_suspend_mode(enum tegra_suspend_mode mode)
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{
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return TEGRA_SUSPEND_NONE;
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}
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static inline void tegra_resume(void)
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{
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}
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#endif /* CONFIG_PM_SLEEP */
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#endif /* __SOC_TEGRA_PM_H__ */
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