2019-05-29 22:17:56 +08:00
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/* SPDX-License-Identifier: GPL-2.0-only */
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2017-08-24 20:40:58 +08:00
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/*
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* Copyright 2017 Texas Instruments, Inc.
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*/
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#ifndef __DT_BINDINGS_CLK_DM814_H
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#define __DT_BINDINGS_CLK_DM814_H
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#define DM814_CLKCTRL_OFFSET 0x0
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#define DM814_CLKCTRL_INDEX(offset) ((offset) - DM814_CLKCTRL_OFFSET)
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/* default clocks */
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#define DM814_USB_OTG_HS_CLKCTRL DM814_CLKCTRL_INDEX(0x58)
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/* alwon clocks */
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#define DM814_UART1_CLKCTRL DM814_CLKCTRL_INDEX(0x150)
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#define DM814_UART2_CLKCTRL DM814_CLKCTRL_INDEX(0x154)
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#define DM814_UART3_CLKCTRL DM814_CLKCTRL_INDEX(0x158)
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#define DM814_GPIO1_CLKCTRL DM814_CLKCTRL_INDEX(0x15c)
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#define DM814_GPIO2_CLKCTRL DM814_CLKCTRL_INDEX(0x160)
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#define DM814_I2C1_CLKCTRL DM814_CLKCTRL_INDEX(0x164)
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#define DM814_I2C2_CLKCTRL DM814_CLKCTRL_INDEX(0x168)
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#define DM814_WD_TIMER_CLKCTRL DM814_CLKCTRL_INDEX(0x18c)
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#define DM814_MCSPI1_CLKCTRL DM814_CLKCTRL_INDEX(0x190)
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#define DM814_GPMC_CLKCTRL DM814_CLKCTRL_INDEX(0x1d0)
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#define DM814_CPGMAC0_CLKCTRL DM814_CLKCTRL_INDEX(0x1d4)
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#define DM814_MPU_CLKCTRL DM814_CLKCTRL_INDEX(0x1dc)
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#define DM814_RTC_CLKCTRL DM814_CLKCTRL_INDEX(0x1f0)
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#define DM814_TPCC_CLKCTRL DM814_CLKCTRL_INDEX(0x1f4)
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#define DM814_TPTC0_CLKCTRL DM814_CLKCTRL_INDEX(0x1f8)
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#define DM814_TPTC1_CLKCTRL DM814_CLKCTRL_INDEX(0x1fc)
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#define DM814_TPTC2_CLKCTRL DM814_CLKCTRL_INDEX(0x200)
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#define DM814_TPTC3_CLKCTRL DM814_CLKCTRL_INDEX(0x204)
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#define DM814_MMC1_CLKCTRL DM814_CLKCTRL_INDEX(0x21c)
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#define DM814_MMC2_CLKCTRL DM814_CLKCTRL_INDEX(0x220)
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#define DM814_MMC3_CLKCTRL DM814_CLKCTRL_INDEX(0x224)
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2020-03-18 00:45:24 +08:00
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/* alwon_ethernet clocks */
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#define DM814_ETHERNET_CLKCTRL_OFFSET 0x1d4
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#define DM814_ETHERNET_CLKCTRL_INDEX(offset) ((offset) - DM814_ETHERNET_CLKCTRL_OFFSET)
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#define DM814_ETHERNET_CPGMAC0_CLKCTRL DM814_ETHERNET_CLKCTRL_INDEX(0x1d4)
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2017-08-24 20:40:58 +08:00
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#endif
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