AcoSail/kernel_optimize_test
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kernel_optimize_test/include/dt-bindings/clock/g12a-aoclkc.h

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dt-bindings: clk: add G12A AO Clock and Reset Bindings Add bindings for the Amlogic G12A AO Clock and Reset controllers. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Jerome Brunet <jbrunet@baylibre.com> Link: https://lkml.kernel.org/r/20190212162859.20743-2-narmstrong@baylibre.com
2019-02-13 00:28:58 +08:00
/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
/*
* Copyright (c) 2016 BayLibre, SAS
* Author: Neil Armstrong <narmstrong@baylibre.com>
*
* Copyright (c) 2018 Amlogic, inc.
* Author: Qiufang Dai <qiufang.dai@amlogic.com>
*/
#ifndef DT_BINDINGS_CLOCK_AMLOGIC_MESON_G12A_AOCLK
#define DT_BINDINGS_CLOCK_AMLOGIC_MESON_G12A_AOCLK
#define CLKID_AO_AHB 0
#define CLKID_AO_IR_IN 1
#define CLKID_AO_I2C_M0 2
#define CLKID_AO_I2C_S0 3
#define CLKID_AO_UART 4
#define CLKID_AO_PROD_I2C 5
#define CLKID_AO_UART2 6
#define CLKID_AO_IR_OUT 7
#define CLKID_AO_SAR_ADC 8
#define CLKID_AO_MAILBOX 9
#define CLKID_AO_M3 10
#define CLKID_AO_AHB_SRAM 11
#define CLKID_AO_RTI 12
#define CLKID_AO_M4_FCLK 13
#define CLKID_AO_M4_HCLK 14
#define CLKID_AO_CLK81 15
clk: g12a-aoclk: re-export CLKID_AO_SAR_ADC_SEL clock id When submitted v2 of the G12A AO-CLK IDs, the SAR_ADC_SEL ID was moved to the internal non-exported bindings, but this clock is necessary and mandatory for the SAR ADC bindings. Export it back to the public bindings. Fixes: be3d960b0aeb ("dt-bindings: clk: add G12A AO Clock and Reset Bindings") Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Jerome Brunet <jbrunet@baylibre.com> Link: https://lkml.kernel.org/r/20190304105358.4987-1-narmstrong@baylibre.com
2019-03-04 18:53:58 +08:00
#define CLKID_AO_SAR_ADC_SEL 16
dt-bindings: clk: add G12A AO Clock and Reset Bindings Add bindings for the Amlogic G12A AO Clock and Reset controllers. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Jerome Brunet <jbrunet@baylibre.com> Link: https://lkml.kernel.org/r/20190212162859.20743-2-narmstrong@baylibre.com
2019-02-13 00:28:58 +08:00
#define CLKID_AO_SAR_ADC_CLK 18
dt-bindings: clock: g12a-aoclk: expose CLKID_AO_CTS_OSCIN When submitted v2 of the G12A AO-CLK IDs, the CLKID_AO_CTS_OSCIN was moved to the internal non-exported bindings, but this clock is necessary for the second AO-CEC-B module since it embeds the 32768Hz dual-divider clock generator unlike the AO-CEC-A module. Export it back to the public bindings. Fixes: be3d960b0aeb ("dt-bindings: clk: add G12A AO Clock and Reset Bindings") Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lkml.kernel.org/r/20190321092010.14382-1-narmstrong@baylibre.com
2019-03-21 17:20:10 +08:00
#define CLKID_AO_CTS_OSCIN 19
dt-bindings: clk: add G12A AO Clock and Reset Bindings Add bindings for the Amlogic G12A AO Clock and Reset controllers. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Jerome Brunet <jbrunet@baylibre.com> Link: https://lkml.kernel.org/r/20190212162859.20743-2-narmstrong@baylibre.com
2019-02-13 00:28:58 +08:00
#define CLKID_AO_32K 23
#define CLKID_AO_CEC 27
#define CLKID_AO_CTS_RTC_OSCIN 28
#endif
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