forked from luck/tmp_suning_uos_patched
40 lines
945 B
ArmAsm
40 lines
945 B
ArmAsm
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/*
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* include/asm-arm/arch-ixp4xx/entry-macro.S
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*
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* Low-level IRQ helper macros for IXP4xx-based platforms
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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.macro disable_fiq
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.endm
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.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
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ldr \irqstat, =(IXP4XX_INTC_BASE_VIRT+IXP4XX_ICIP_OFFSET)
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ldr \irqstat, [\irqstat] @ get interrupts
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cmp \irqstat, #0
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beq 1001f
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clz \irqnr, \irqstat
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mov \base, #31
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subs \irqnr, \base, \irqnr
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1001:
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/*
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* IXP465 has an upper IRQ status register
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*/
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#if defined(CONFIG_CPU_IXP46X)
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bne 1002f
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ldr \irqstat, =(IXP4XX_INTC_BASE_VIRT+IXP4XX_ICIP2_OFFSET)
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ldr \irqstat, [\irqstat] @ get upper interrupts
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mov \irqnr, #63
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clz \irqstat, \irqstat
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cmp \irqstat, #32
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subne \irqnr, \irqnr, \irqstat
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1002:
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#endif
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.endm
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