forked from luck/tmp_suning_uos_patched
ARM: net: bpf: correct stack layout documentation
The stack layout documentation incorrectly suggests that the BPF JIT scratch space starts immediately below BPF_FP. This is not correct, so let's fix the documentation to reflect reality. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
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@ -28,24 +28,43 @@
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int bpf_jit_enable __read_mostly;
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int bpf_jit_enable __read_mostly;
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/*
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/*
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* eBPF prog stack layout
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* eBPF prog stack layout:
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*
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*
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* high
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* high
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* original ARM_SP => +-----+ eBPF prologue
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* original ARM_SP => +-----+
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* |FP/LR|
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* | | callee saved registers
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* current ARM_FP => +-----+
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* +-----+ <= (BPF_FP + SCRATCH_SIZE)
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* | ... | callee saved registers
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* eBPF fp register => +-----+ <= (BPF_FP)
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* | ... | eBPF JIT scratch space
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* | ... | eBPF JIT scratch space
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* | | eBPF prog stack
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* eBPF fp register => +-----+
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* (BPF_FP) | ... | eBPF prog stack
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* +-----+
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* +-----+
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* |RSVD | JIT scratchpad
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* |RSVD | JIT scratchpad
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* current ARM_SP => +-----+ <= (BPF_FP - STACK_SIZE)
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* current ARM_SP => +-----+ <= (BPF_FP - STACK_SIZE + SCRATCH_SIZE)
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* | |
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* | |
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* | ... | Function call stack
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* | ... | Function call stack
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* | |
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* | |
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* +-----+
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* +-----+
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* low
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* low
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*
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* The callee saved registers depends on whether frame pointers are enabled.
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* With frame pointers (to be compliant with the ABI):
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*
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* high
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* original ARM_SP => +------------------+ \
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* | pc | |
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* current ARM_FP => +------------------+ } callee saved registers
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* |r4-r8,r10,fp,ip,lr| |
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* +------------------+ /
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* low
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*
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* Without frame pointers:
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*
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* high
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* original ARM_SP => +------------------+
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* | lr | (optional)
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* | r4-r8,r10 | callee saved registers
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* +------------------+
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* low
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*/
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*/
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#define STACK_OFFSET(k) (k)
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#define STACK_OFFSET(k) (k)
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