forked from luck/tmp_suning_uos_patched
DA830 EVM: use DA8XX_AEMIF_*_BASE #define's
The board file #define's its own version of EMIFA base addresses, while there are DA8XX_AEMIF_*_BASE macros #define'd in <mach/da8xx.h>. Start using them instead. Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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@ -33,9 +33,6 @@
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#define DA830_EVM_PHY_MASK 0x0
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#define DA830_EVM_MDIO_FREQUENCY 2200000 /* PHY bus frequency */
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#define DA830_EMIF25_ASYNC_DATA_CE3_BASE 0x62000000
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#define DA830_EMIF25_CONTROL_BASE 0x68000000
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/*
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* USB1 VBUS is controlled by GPIO1[15], over-current is reported on GPIO2[4].
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*/
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@ -375,13 +372,13 @@ static struct davinci_nand_pdata da830_evm_nand_pdata = {
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static struct resource da830_evm_nand_resources[] = {
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[0] = { /* First memory resource is NAND I/O window */
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.start = DA830_EMIF25_ASYNC_DATA_CE3_BASE,
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.end = DA830_EMIF25_ASYNC_DATA_CE3_BASE + PAGE_SIZE - 1,
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.start = DA8XX_AEMIF_CS3_BASE,
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.end = DA8XX_AEMIF_CS3_BASE + PAGE_SIZE - 1,
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.flags = IORESOURCE_MEM,
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},
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[1] = { /* Second memory resource is AEMIF control registers */
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.start = DA830_EMIF25_CONTROL_BASE,
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.end = DA830_EMIF25_CONTROL_BASE + SZ_32K - 1,
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.start = DA8XX_AEMIF_CTL_BASE,
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.end = DA8XX_AEMIF_CTL_BASE + SZ_32K - 1,
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.flags = IORESOURCE_MEM,
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},
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};
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