forked from luck/tmp_suning_uos_patched
ARM: tegra30: flowctrl: add cpu_suspend_exter/exit function
The flow controller can help CPU to go into suspend mode (powered-down state). When CPU go into powered-down state, it needs some careful settings before getting into and after leaving. The enter and exit functions do that by configuring appropriate mode for flow controller. Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
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@ -21,6 +21,7 @@
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/io.h>
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#include <linux/cpumask.h>
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#include "flowctrl.h"
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#include "iomap.h"
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@ -50,6 +51,14 @@ static void flowctrl_update(u8 offset, u32 value)
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readl_relaxed(addr);
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}
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u32 flowctrl_read_cpu_csr(unsigned int cpuid)
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{
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u8 offset = flowctrl_offset_cpu_csr[cpuid];
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void __iomem *addr = IO_ADDRESS(TEGRA_FLOW_CTRL_BASE) + offset;
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return readl(addr);
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}
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void flowctrl_write_cpu_csr(unsigned int cpuid, u32 value)
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{
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return flowctrl_update(flowctrl_offset_cpu_csr[cpuid], value);
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@ -59,3 +68,41 @@ void flowctrl_write_cpu_halt(unsigned int cpuid, u32 value)
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{
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return flowctrl_update(flowctrl_offset_halt_cpu[cpuid], value);
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}
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void flowctrl_cpu_suspend_enter(unsigned int cpuid)
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{
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unsigned int reg;
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int i;
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reg = flowctrl_read_cpu_csr(cpuid);
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reg &= ~TEGRA30_FLOW_CTRL_CSR_WFE_BITMAP; /* clear wfe bitmap */
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reg &= ~TEGRA30_FLOW_CTRL_CSR_WFI_BITMAP; /* clear wfi bitmap */
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reg |= FLOW_CTRL_CSR_INTR_FLAG; /* clear intr flag */
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reg |= FLOW_CTRL_CSR_EVENT_FLAG; /* clear event flag */
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reg |= TEGRA30_FLOW_CTRL_CSR_WFI_CPU0 << cpuid; /* pwr gating on wfi */
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reg |= FLOW_CTRL_CSR_ENABLE; /* pwr gating */
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flowctrl_write_cpu_csr(cpuid, reg);
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for (i = 0; i < num_possible_cpus(); i++) {
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if (i == cpuid)
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continue;
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reg = flowctrl_read_cpu_csr(i);
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reg |= FLOW_CTRL_CSR_EVENT_FLAG;
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reg |= FLOW_CTRL_CSR_INTR_FLAG;
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flowctrl_write_cpu_csr(i, reg);
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}
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}
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void flowctrl_cpu_suspend_exit(unsigned int cpuid)
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{
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unsigned int reg;
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/* Disable powergating via flow controller for CPU0 */
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reg = flowctrl_read_cpu_csr(cpuid);
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reg &= ~TEGRA30_FLOW_CTRL_CSR_WFE_BITMAP; /* clear wfe bitmap */
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reg &= ~TEGRA30_FLOW_CTRL_CSR_WFI_BITMAP; /* clear wfi bitmap */
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reg &= ~FLOW_CTRL_CSR_ENABLE; /* clear enable */
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reg |= FLOW_CTRL_CSR_INTR_FLAG; /* clear intr */
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reg |= FLOW_CTRL_CSR_EVENT_FLAG; /* clear event */
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flowctrl_write_cpu_csr(cpuid, reg);
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}
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@ -34,9 +34,17 @@
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#define FLOW_CTRL_HALT_CPU1_EVENTS 0x14
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#define FLOW_CTRL_CPU1_CSR 0x18
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#define TEGRA30_FLOW_CTRL_CSR_WFI_CPU0 (1 << 8)
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#define TEGRA30_FLOW_CTRL_CSR_WFE_BITMAP (0xF << 4)
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#define TEGRA30_FLOW_CTRL_CSR_WFI_BITMAP (0xF << 8)
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#ifndef __ASSEMBLY__
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u32 flowctrl_read_cpu_csr(unsigned int cpuid);
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void flowctrl_write_cpu_csr(unsigned int cpuid, u32 value);
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void flowctrl_write_cpu_halt(unsigned int cpuid, u32 value);
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void flowctrl_cpu_suspend_enter(unsigned int cpuid);
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void flowctrl_cpu_suspend_exit(unsigned int cpuid);
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#endif
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#endif
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