forked from luck/tmp_suning_uos_patched
ARM: OMAP4: Export omap4_get_base*() rather than global address pointers
This patch exports APIs to get base address for GIC distributor, CPU interface, SCU and PL310 L2 Cache which are used in OMAP4 PM code. This was suggested by Kevin Hilman <khilman@ti.com> during OMAP4 PM code review. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Jean Pihet <j-pihet@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Tested-by: Vishwanath BS <vishwanath.bs@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
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@ -168,7 +168,16 @@ void omap3_intc_handle_irq(struct pt_regs *regs);
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#endif
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#endif
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#ifdef CONFIG_CACHE_L2X0
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#ifdef CONFIG_CACHE_L2X0
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extern void __iomem *l2cache_base;
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extern void __iomem *omap4_get_l2cache_base(void);
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#endif
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#ifdef CONFIG_SMP
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extern void __iomem *omap4_get_scu_base(void);
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#else
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static inline void __iomem *omap4_get_scu_base(void)
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{
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return NULL;
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}
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#endif
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#endif
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extern void __init gic_init_irq(void);
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extern void __init gic_init_irq(void);
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@ -32,6 +32,11 @@ static void __iomem *scu_base;
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static DEFINE_SPINLOCK(boot_lock);
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static DEFINE_SPINLOCK(boot_lock);
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void __iomem *omap4_get_scu_base(void)
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{
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return scu_base;
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}
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void __cpuinit platform_secondary_init(unsigned int cpu)
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void __cpuinit platform_secondary_init(unsigned int cpu)
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{
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{
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/*
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/*
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@ -26,7 +26,7 @@
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#include "common.h"
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#include "common.h"
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#ifdef CONFIG_CACHE_L2X0
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#ifdef CONFIG_CACHE_L2X0
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void __iomem *l2cache_base;
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static void __iomem *l2cache_base;
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#endif
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#endif
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void __init gic_init_irq(void)
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void __init gic_init_irq(void)
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@ -47,6 +47,11 @@ void __init gic_init_irq(void)
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#ifdef CONFIG_CACHE_L2X0
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#ifdef CONFIG_CACHE_L2X0
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void __iomem *omap4_get_l2cache_base(void)
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{
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return l2cache_base;
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}
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static void omap4_l2x0_disable(void)
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static void omap4_l2x0_disable(void)
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{
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{
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/* Disable PL310 L2 Cache controller */
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/* Disable PL310 L2 Cache controller */
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