forked from luck/tmp_suning_uos_patched
[POWERPC] cell: Add routines for managing PMU interrupts
The following routines are added to arch/powerpc/platforms/cell/pmu.c: cbe_clear_pm_interrupts() cbe_enable_pm_interrupts() cbe_disable_pm_interrupts() cbe_query_pm_interrupts() cbe_pm_irq() cbe_init_pm_irq() This also adds a routine in arch/powerpc/platforms/cell/interrupt.c and some macros in cbe_regs.h to manipulate the IIC_IR register: iic_set_interrupt_routing() Signed-off-by: Kevin Corry <kevcorry@us.ibm.com> Signed-off-by: Carl Love <carll@us.ibm.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
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@ -185,6 +185,14 @@ struct cbe_iic_regs {
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struct cbe_iic_thread_regs thread[2]; /* 0x0400 */
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u64 iic_ir; /* 0x0440 */
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#define CBE_IIC_IR_PRIO(x) (((x) & 0xf) << 12)
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#define CBE_IIC_IR_DEST_NODE(x) (((x) & 0xf) << 4)
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#define CBE_IIC_IR_DEST_UNIT(x) ((x) & 0xf)
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#define CBE_IIC_IR_IOC_0 0x0
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#define CBE_IIC_IR_IOC_1S 0xb
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#define CBE_IIC_IR_PT_0 0xe
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#define CBE_IIC_IR_PT_1 0xf
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u64 iic_is; /* 0x0448 */
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#define CBE_IIC_IS_PMI 0x2
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@ -396,3 +396,19 @@ void __init iic_init_IRQ(void)
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/* Enable on current CPU */
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iic_setup_cpu();
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}
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void iic_set_interrupt_routing(int cpu, int thread, int priority)
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{
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struct cbe_iic_regs __iomem *iic_regs = cbe_get_cpu_iic_regs(cpu);
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u64 iic_ir = 0;
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int node = cpu >> 1;
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/* Set which node and thread will handle the next interrupt */
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iic_ir |= CBE_IIC_IR_PRIO(priority) |
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CBE_IIC_IR_DEST_NODE(node);
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if (thread == 0)
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iic_ir |= CBE_IIC_IR_DEST_UNIT(CBE_IIC_IR_PT_0);
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else
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iic_ir |= CBE_IIC_IR_DEST_UNIT(CBE_IIC_IR_PT_1);
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out_be64(&iic_regs->iic_ir, iic_ir);
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}
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@ -83,5 +83,7 @@ extern u8 iic_get_target_id(int cpu);
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extern void spider_init_IRQ(void);
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extern void iic_set_interrupt_routing(int cpu, int thread, int priority);
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#endif
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#endif /* ASM_CELL_PIC_H */
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@ -22,9 +22,11 @@
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <linux/interrupt.h>
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#include <linux/types.h>
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#include <asm/io.h>
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#include <asm/machdep.h>
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#include <asm/pmc.h>
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#include <asm/reg.h>
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#include <asm/spu.h>
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@ -338,3 +340,71 @@ void cbe_read_trace_buffer(u32 cpu, u64 *buf)
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}
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EXPORT_SYMBOL_GPL(cbe_read_trace_buffer);
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/*
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* Enabling/disabling interrupts for the entire performance monitoring unit.
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*/
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u32 cbe_query_pm_interrupts(u32 cpu)
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{
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return cbe_read_pm(cpu, pm_status);
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}
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EXPORT_SYMBOL_GPL(cbe_query_pm_interrupts);
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u32 cbe_clear_pm_interrupts(u32 cpu)
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{
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/* Reading pm_status clears the interrupt bits. */
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return cbe_query_pm_interrupts(cpu);
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}
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EXPORT_SYMBOL_GPL(cbe_clear_pm_interrupts);
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void cbe_enable_pm_interrupts(u32 cpu, u32 thread, u32 mask)
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{
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/* Set which node and thread will handle the next interrupt. */
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iic_set_interrupt_routing(cpu, thread, 0);
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/* Enable the interrupt bits in the pm_status register. */
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if (mask)
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cbe_write_pm(cpu, pm_status, mask);
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}
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EXPORT_SYMBOL_GPL(cbe_enable_pm_interrupts);
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void cbe_disable_pm_interrupts(u32 cpu)
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{
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cbe_clear_pm_interrupts(cpu);
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cbe_write_pm(cpu, pm_status, 0);
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}
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EXPORT_SYMBOL_GPL(cbe_disable_pm_interrupts);
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static irqreturn_t cbe_pm_irq(int irq, void *dev_id, struct pt_regs *regs)
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{
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perf_irq(regs);
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return IRQ_HANDLED;
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}
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int __init cbe_init_pm_irq(void)
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{
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unsigned int irq;
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int rc, node;
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for_each_node(node) {
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irq = irq_create_mapping(NULL, IIC_IRQ_IOEX_PMI |
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(node << IIC_IRQ_NODE_SHIFT));
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if (irq == NO_IRQ) {
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printk("ERROR: Unable to allocate irq for node %d\n",
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node);
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return -EINVAL;
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}
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rc = request_irq(irq, cbe_pm_irq,
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IRQF_DISABLED, "cbe-pmu-0", NULL);
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if (rc) {
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printk("ERROR: Request for irq on node %d failed\n",
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node);
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return rc;
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}
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}
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return 0;
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}
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arch_initcall(cbe_init_pm_irq);
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@ -87,4 +87,9 @@ extern void cbe_disable_pm(u32 cpu);
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extern void cbe_read_trace_buffer(u32 cpu, u64 *buf);
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extern void cbe_enable_pm_interrupts(u32 cpu, u32 thread, u32 mask);
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extern void cbe_disable_pm_interrupts(u32 cpu);
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extern u32 cbe_query_pm_interrupts(u32 cpu);
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extern u32 cbe_clear_pm_interrupts(u32 cpu);
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#endif /* __ASM_CELL_PMU_H__ */
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