forked from luck/tmp_suning_uos_patched
Merge branch 'irq/qcom-pdc-wakeup' into irq/irqchip-next
Signed-off-by: Marc Zyngier <maz@kernel.org>
This commit is contained in:
commit
04e8c5b2fa
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@ -205,7 +205,8 @@ static struct irq_chip qcom_pdc_gic_chip = {
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.irq_set_type = qcom_pdc_gic_set_type,
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.flags = IRQCHIP_MASK_ON_SUSPEND |
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IRQCHIP_SET_TYPE_MASKED |
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IRQCHIP_SKIP_SET_WAKE,
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IRQCHIP_SKIP_SET_WAKE |
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IRQCHIP_ENABLE_WAKEUP_ON_SUSPEND,
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.irq_set_vcpu_affinity = irq_chip_set_vcpu_affinity_parent,
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.irq_set_affinity = irq_chip_set_affinity_parent,
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};
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@ -340,7 +341,8 @@ static const struct irq_domain_ops qcom_pdc_gpio_ops = {
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static int pdc_setup_pin_mapping(struct device_node *np)
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{
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int ret, n;
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int ret, n, i;
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u32 irq_index, reg_index, val;
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n = of_property_count_elems_of_size(np, "qcom,pdc-ranges", sizeof(u32));
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if (n <= 0 || n % 3)
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@ -369,6 +371,14 @@ static int pdc_setup_pin_mapping(struct device_node *np)
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&pdc_region[n].cnt);
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if (ret)
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return ret;
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for (i = 0; i < pdc_region[n].cnt; i++) {
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reg_index = (i + pdc_region[n].pin_base) >> 5;
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irq_index = (i + pdc_region[n].pin_base) & 0x1f;
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val = pdc_reg_read(IRQ_ENABLE_BANK, reg_index);
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val &= ~BIT(irq_index);
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pdc_reg_write(IRQ_ENABLE_BANK, reg_index, val);
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}
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}
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return 0;
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@ -1077,12 +1077,10 @@ static int msm_gpio_irq_set_wake(struct irq_data *d, unsigned int on)
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* when TLMM is powered on. To allow that, enable the GPIO
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* summary line to be wakeup capable at GIC.
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*/
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if (d->parent_data)
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irq_chip_set_wake_parent(d, on);
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if (d->parent_data && test_bit(d->hwirq, pctrl->skip_wake_irqs))
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return irq_chip_set_wake_parent(d, on);
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irq_set_irq_wake(pctrl->irq, on);
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return 0;
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return irq_set_irq_wake(pctrl->irq, on);
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}
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static int msm_gpio_irq_reqres(struct irq_data *d)
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@ -1243,6 +1241,9 @@ static int msm_gpio_init(struct msm_pinctrl *pctrl)
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pctrl->irq_chip.irq_release_resources = msm_gpio_irq_relres;
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pctrl->irq_chip.irq_set_affinity = msm_gpio_irq_set_affinity;
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pctrl->irq_chip.irq_set_vcpu_affinity = msm_gpio_irq_set_vcpu_affinity;
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pctrl->irq_chip.flags = IRQCHIP_MASK_ON_SUSPEND |
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IRQCHIP_SET_TYPE_MASKED |
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IRQCHIP_ENABLE_WAKEUP_ON_SUSPEND;
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np = of_parse_phandle(pctrl->dev->of_node, "wakeup-parent", 0);
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if (np) {
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@ -217,6 +217,8 @@ struct irq_data {
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* from actual interrupt context.
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* IRQD_AFFINITY_ON_ACTIVATE - Affinity is set on activation. Don't call
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* irq_chip::irq_set_affinity() when deactivated.
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* IRQD_IRQ_ENABLED_ON_SUSPEND - Interrupt is enabled on suspend by irq pm if
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* irqchip have flag IRQCHIP_ENABLE_WAKEUP_ON_SUSPEND set.
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*/
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enum {
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IRQD_TRIGGER_MASK = 0xf,
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@ -242,6 +244,7 @@ enum {
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IRQD_MSI_NOMASK_QUIRK = (1 << 27),
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IRQD_HANDLE_ENFORCE_IRQCTX = (1 << 28),
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IRQD_AFFINITY_ON_ACTIVATE = (1 << 29),
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IRQD_IRQ_ENABLED_ON_SUSPEND = (1 << 30),
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};
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#define __irqd_to_state(d) ACCESS_PRIVATE((d)->common, state_use_accessors)
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@ -321,6 +324,11 @@ static inline bool irqd_is_handle_enforce_irqctx(struct irq_data *d)
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return __irqd_to_state(d) & IRQD_HANDLE_ENFORCE_IRQCTX;
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}
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static inline bool irqd_is_enabled_on_suspend(struct irq_data *d)
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{
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return __irqd_to_state(d) & IRQD_IRQ_ENABLED_ON_SUSPEND;
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}
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static inline bool irqd_is_wakeup_set(struct irq_data *d)
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{
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return __irqd_to_state(d) & IRQD_WAKEUP_STATE;
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@ -555,8 +563,10 @@ struct irq_chip {
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* IRQCHIP_SKIP_SET_WAKE: Skip chip.irq_set_wake(), for this irq chip
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* IRQCHIP_ONESHOT_SAFE: One shot does not require mask/unmask
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* IRQCHIP_EOI_THREADED: Chip requires eoi() on unmask in threaded mode
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* IRQCHIP_SUPPORTS_LEVEL_MSI Chip can provide two doorbells for Level MSIs
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* IRQCHIP_SUPPORTS_LEVEL_MSI: Chip can provide two doorbells for Level MSIs
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* IRQCHIP_SUPPORTS_NMI: Chip can deliver NMIs, only for root irqchips
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* IRQCHIP_ENABLE_WAKEUP_ON_SUSPEND: Invokes __enable_irq()/__disable_irq() for wake irqs
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* in the suspend path if they are in disabled state
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*/
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enum {
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IRQCHIP_SET_TYPE_MASKED = (1 << 0),
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@ -568,6 +578,7 @@ enum {
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IRQCHIP_EOI_THREADED = (1 << 6),
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IRQCHIP_SUPPORTS_LEVEL_MSI = (1 << 7),
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IRQCHIP_SUPPORTS_NMI = (1 << 8),
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IRQCHIP_ENABLE_WAKEUP_ON_SUSPEND = (1 << 9),
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};
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#include <linux/irqdesc.h>
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@ -57,6 +57,7 @@ static const struct irq_bit_descr irqchip_flags[] = {
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BIT_MASK_DESCR(IRQCHIP_EOI_THREADED),
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BIT_MASK_DESCR(IRQCHIP_SUPPORTS_LEVEL_MSI),
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BIT_MASK_DESCR(IRQCHIP_SUPPORTS_NMI),
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BIT_MASK_DESCR(IRQCHIP_ENABLE_WAKEUP_ON_SUSPEND),
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};
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static void
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@ -125,6 +126,8 @@ static const struct irq_bit_descr irqdata_states[] = {
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BIT_MASK_DESCR(IRQD_DEFAULT_TRIGGER_SET),
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BIT_MASK_DESCR(IRQD_HANDLE_ENFORCE_IRQCTX),
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BIT_MASK_DESCR(IRQD_IRQ_ENABLED_ON_SUSPEND),
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};
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static const struct irq_bit_descr irqdesc_states[] = {
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@ -69,12 +69,26 @@ void irq_pm_remove_action(struct irq_desc *desc, struct irqaction *action)
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static bool suspend_device_irq(struct irq_desc *desc)
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{
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unsigned long chipflags = irq_desc_get_chip(desc)->flags;
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struct irq_data *irqd = &desc->irq_data;
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if (!desc->action || irq_desc_is_chained(desc) ||
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desc->no_suspend_depth)
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return false;
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if (irqd_is_wakeup_set(&desc->irq_data)) {
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irqd_set(&desc->irq_data, IRQD_WAKEUP_ARMED);
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if (irqd_is_wakeup_set(irqd)) {
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irqd_set(irqd, IRQD_WAKEUP_ARMED);
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if ((chipflags & IRQCHIP_ENABLE_WAKEUP_ON_SUSPEND) &&
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irqd_irq_disabled(irqd)) {
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/*
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* Interrupt marked for wakeup is in disabled state.
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* Enable interrupt here to unmask/enable in irqchip
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* to be able to resume with such interrupts.
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*/
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__enable_irq(desc);
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irqd_set(irqd, IRQD_IRQ_ENABLED_ON_SUSPEND);
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}
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/*
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* We return true here to force the caller to issue
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* synchronize_irq(). We need to make sure that the
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@ -93,7 +107,7 @@ static bool suspend_device_irq(struct irq_desc *desc)
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* chip level. The chip implementation indicates that with
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* IRQCHIP_MASK_ON_SUSPEND.
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*/
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if (irq_desc_get_chip(desc)->flags & IRQCHIP_MASK_ON_SUSPEND)
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if (chipflags & IRQCHIP_MASK_ON_SUSPEND)
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mask_irq(desc);
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return true;
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}
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@ -137,7 +151,19 @@ EXPORT_SYMBOL_GPL(suspend_device_irqs);
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static void resume_irq(struct irq_desc *desc)
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{
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irqd_clear(&desc->irq_data, IRQD_WAKEUP_ARMED);
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struct irq_data *irqd = &desc->irq_data;
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irqd_clear(irqd, IRQD_WAKEUP_ARMED);
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if (irqd_is_enabled_on_suspend(irqd)) {
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/*
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* Interrupt marked for wakeup was enabled during suspend
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* entry. Disable such interrupts to restore them back to
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* original state.
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*/
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__disable_irq(desc);
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irqd_clear(irqd, IRQD_IRQ_ENABLED_ON_SUSPEND);
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}
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if (desc->istate & IRQS_SUSPENDED)
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goto resume;
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