forked from luck/tmp_suning_uos_patched
[ARM] 3960/1: AT91: Final SAM9 intergration patches.
This patch includes a number of small changes for integrating the AT91SAM9261 and AT91SAM0260 support. * Can only select support for one AT91 processor at a time. * Remove most of the remaining static memory mapping for the AT91RM9200. * Reserve 1Mb of memory below the IO for mapping the internal SRAM and any custom board-specific devices (ie, FPGA). * The SAM9260 has more serial ports, so increase the maximum to 7. * Define the standard chipselect addresses, and define other addresses relative to those. * CLOCK_TICK_RATE is different on the SAM926x's. Signed-off-by: Andrew Victor <andrew@sanpeople.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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@ -2,7 +2,8 @@ if ARCH_AT91
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menu "Atmel AT91 System-on-Chip"
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comment "Atmel AT91 Processors"
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choice
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prompt "Atmel AT91 Processor"
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config ARCH_AT91RM9200
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bool "AT91RM9200"
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@ -13,6 +14,8 @@ config ARCH_AT91SAM9260
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config ARCH_AT91SAM9261
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bool "AT91SAM9261"
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endchoice
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# ----------------------------------------------------------
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if ARCH_AT91RM9200
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@ -33,7 +36,6 @@ config ARCH_AT91RM9200DK
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Select this if you are using Atmel's AT91RM9200-DK Development board.
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(Discontinued)
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config MACH_AT91RM9200EK
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bool "Atmel AT91RM9200-EK Evaluation Kit"
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depends on ARCH_AT91RM9200
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@ -10,7 +10,7 @@ obj- :=
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obj-$(CONFIG_PM) += pm.o
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# CPU-specific support
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obj-$(CONFIG_ARCH_AT91RM9200) += at91rm9200.o at91rm9200_time.o at91rm9200_devices.c
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obj-$(CONFIG_ARCH_AT91RM9200) += at91rm9200.o at91rm9200_time.o at91rm9200_devices.o
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obj-$(CONFIG_ARCH_AT91SAM9260) += at91sam9260.o at91sam926x_time.o at91sam9260_devices.o
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obj-$(CONFIG_ARCH_AT91SAM9261) += at91sam9261.o at91sam926x_time.o at91sam9261_devices.o
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@ -27,33 +27,13 @@ static struct map_desc at91rm9200_io_desc[] __initdata = {
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.pfn = __phys_to_pfn(AT91_BASE_SYS),
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.length = SZ_4K,
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.type = MT_DEVICE,
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}, {
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.virtual = AT91_VA_BASE_SPI,
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.pfn = __phys_to_pfn(AT91RM9200_BASE_SPI),
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.length = SZ_16K,
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.type = MT_DEVICE,
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}, {
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.virtual = AT91_VA_BASE_EMAC,
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.pfn = __phys_to_pfn(AT91RM9200_BASE_EMAC),
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.length = SZ_16K,
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.type = MT_DEVICE,
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}, {
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.virtual = AT91_VA_BASE_TWI,
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.pfn = __phys_to_pfn(AT91RM9200_BASE_TWI),
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.length = SZ_16K,
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.type = MT_DEVICE,
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}, {
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.virtual = AT91_VA_BASE_MCI,
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.pfn = __phys_to_pfn(AT91RM9200_BASE_MCI),
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.length = SZ_16K,
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.type = MT_DEVICE,
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}, {
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.virtual = AT91_VA_BASE_UDP,
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.pfn = __phys_to_pfn(AT91RM9200_BASE_UDP),
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.length = SZ_16K,
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.type = MT_DEVICE,
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}, {
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.virtual = AT91_SRAM_VIRT_BASE,
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.virtual = AT91_IO_VIRT_BASE - AT91RM9200_SRAM_SIZE,
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.pfn = __phys_to_pfn(AT91RM9200_SRAM_BASE),
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.length = AT91RM9200_SRAM_SIZE,
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.type = MT_DEVICE,
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@ -42,29 +42,27 @@
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* Virtual to Physical Address mapping for IO devices.
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*/
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#define AT91_VA_BASE_SYS AT91_IO_P2V(AT91_BASE_SYS)
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#define AT91_VA_BASE_SPI AT91_IO_P2V(AT91RM9200_BASE_SPI)
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#define AT91_VA_BASE_EMAC AT91_IO_P2V(AT91RM9200_BASE_EMAC)
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#define AT91_VA_BASE_TWI AT91_IO_P2V(AT91RM9200_BASE_TWI)
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#define AT91_VA_BASE_MCI AT91_IO_P2V(AT91RM9200_BASE_MCI)
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#define AT91_VA_BASE_UDP AT91_IO_P2V(AT91RM9200_BASE_UDP)
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/* Internal SRAM is mapped below the IO devices */
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#define AT91_SRAM_VIRT_BASE (AT91_IO_VIRT_BASE - AT91RM9200_SRAM_SIZE)
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#define AT91_SRAM_MAX SZ_1M
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#define AT91_VIRT_BASE (AT91_IO_VIRT_BASE - AT91_SRAM_MAX)
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/* Serial ports */
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#define ATMEL_MAX_UART 5 /* 4 USART3's and one DBGU port */
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#define ATMEL_MAX_UART 7 /* 6 USART3's and one DBGU port (SAM9260) */
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/* FLASH */
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#define AT91_FLASH_BASE 0x10000000 /* NCS0: Flash physical base address */
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/* External Memory Map */
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#define AT91_CHIPSELECT_0 0x10000000
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#define AT91_CHIPSELECT_1 0x20000000
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#define AT91_CHIPSELECT_2 0x30000000
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#define AT91_CHIPSELECT_3 0x40000000
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#define AT91_CHIPSELECT_4 0x50000000
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#define AT91_CHIPSELECT_5 0x60000000
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#define AT91_CHIPSELECT_6 0x70000000
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#define AT91_CHIPSELECT_7 0x80000000
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/* SDRAM */
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#define AT91_SDRAM_BASE 0x20000000 /* NCS1: SDRAM physical base address */
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/* SmartMedia */
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#define AT91_SMARTMEDIA_BASE 0x40000000 /* NCS3: Smartmedia physical base address */
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/* Compact Flash */
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#define AT91_CF_BASE 0x50000000 /* NCS4-NCS6: Compact Flash physical base address */
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#define AT91_SDRAM_BASE AT91_CHIPSELECT_1
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/* Clocks */
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#define AT91_SLOW_CLOCK 32768 /* slow clock */
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@ -23,6 +23,15 @@
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#include <asm/hardware.h>
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#if defined(CONFIG_ARCH_AT91RM9200)
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#define CLOCK_TICK_RATE (AT91_SLOW_CLOCK)
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#elif defined(CONFIG_ARCH_AT91SAM9260) || defined(CONFIG_ARCH_AT91SAM9261)
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#define AT91SAM9_MASTER_CLOCK 99300000
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#define CLOCK_TICK_RATE (AT91SAM9_MASTER_CLOCK/16)
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#endif
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#endif
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@ -21,6 +21,6 @@
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#ifndef __ASM_ARCH_VMALLOC_H
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#define __ASM_ARCH_VMALLOC_H
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#define VMALLOC_END (AT91_SRAM_VIRT_BASE & PGDIR_MASK)
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#define VMALLOC_END (AT91_VIRT_BASE & PGDIR_MASK)
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#endif
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