forked from luck/tmp_suning_uos_patched
ARM: mach-shmobile: sh73a0: add MMC data pin pull-up
This patch adds MMC data pin pull-up option for pfc-sh73a0.c, and select it on ag5evm board. The MMC read/write will be error without this patch. Cc: Takashi YOSHII <takashi.yoshii.zj@renesas.com> Tested-by: Simon Horman <horms@verge.net.au> Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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@ -515,14 +515,14 @@ static void __init ag5evm_init(void)
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/* enable MMCIF */
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gpio_request(GPIO_FN_MMCCLK0, NULL);
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gpio_request(GPIO_FN_MMCCMD0_PU, NULL);
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gpio_request(GPIO_FN_MMCD0_0, NULL);
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gpio_request(GPIO_FN_MMCD0_1, NULL);
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gpio_request(GPIO_FN_MMCD0_2, NULL);
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gpio_request(GPIO_FN_MMCD0_3, NULL);
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gpio_request(GPIO_FN_MMCD0_4, NULL);
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gpio_request(GPIO_FN_MMCD0_5, NULL);
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gpio_request(GPIO_FN_MMCD0_6, NULL);
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gpio_request(GPIO_FN_MMCD0_7, NULL);
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gpio_request(GPIO_FN_MMCD0_0_PU, NULL);
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gpio_request(GPIO_FN_MMCD0_1_PU, NULL);
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gpio_request(GPIO_FN_MMCD0_2_PU, NULL);
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gpio_request(GPIO_FN_MMCD0_3_PU, NULL);
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gpio_request(GPIO_FN_MMCD0_4_PU, NULL);
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gpio_request(GPIO_FN_MMCD0_5_PU, NULL);
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gpio_request(GPIO_FN_MMCD0_6_PU, NULL);
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gpio_request(GPIO_FN_MMCD0_7_PU, NULL);
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gpio_request(GPIO_PORT208, NULL); /* Reset */
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gpio_direction_output(GPIO_PORT208, 1);
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@ -470,6 +470,14 @@ enum {
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GPIO_FN_SDHICMD2_PU,
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GPIO_FN_MMCCMD0_PU,
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GPIO_FN_MMCCMD1_PU,
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GPIO_FN_MMCD0_0_PU,
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GPIO_FN_MMCD0_1_PU,
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GPIO_FN_MMCD0_2_PU,
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GPIO_FN_MMCD0_3_PU,
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GPIO_FN_MMCD0_4_PU,
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GPIO_FN_MMCD0_5_PU,
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GPIO_FN_MMCD0_6_PU,
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GPIO_FN_MMCD0_7_PU,
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GPIO_FN_FSIACK_PU,
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GPIO_FN_FSIAILR_PU,
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GPIO_FN_FSIAIBT_PU,
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@ -508,6 +508,14 @@ enum {
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SDHICMD2_PU_MARK,
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MMCCMD0_PU_MARK,
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MMCCMD1_PU_MARK,
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MMCD0_0_PU_MARK,
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MMCD0_1_PU_MARK,
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MMCD0_2_PU_MARK,
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MMCD0_3_PU_MARK,
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MMCD0_4_PU_MARK,
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MMCD0_5_PU_MARK,
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MMCD0_6_PU_MARK,
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MMCD0_7_PU_MARK,
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FSIBISLD_PU_MARK,
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FSIACK_PU_MARK,
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FSIAILR_PU_MARK,
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@ -1561,6 +1569,24 @@ static pinmux_enum_t pinmux_data[] = {
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MSEL4CR_MSEL15_0),
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PINMUX_DATA(MMCCMD1_PU_MARK, PORT297_FN2, PORT297_IN_PU,
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MSEL4CR_MSEL15_1),
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PINMUX_DATA(MMCD0_0_PU_MARK,
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PORT271_FN1, PORT271_IN_PU, MSEL4CR_MSEL15_0),
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PINMUX_DATA(MMCD0_1_PU_MARK,
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PORT272_FN1, PORT272_IN_PU, MSEL4CR_MSEL15_0),
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PINMUX_DATA(MMCD0_2_PU_MARK,
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PORT273_FN1, PORT273_IN_PU, MSEL4CR_MSEL15_0),
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PINMUX_DATA(MMCD0_3_PU_MARK,
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PORT274_FN1, PORT274_IN_PU, MSEL4CR_MSEL15_0),
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PINMUX_DATA(MMCD0_4_PU_MARK,
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PORT275_FN1, PORT275_IN_PU, MSEL4CR_MSEL15_0),
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PINMUX_DATA(MMCD0_5_PU_MARK,
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PORT276_FN1, PORT276_IN_PU, MSEL4CR_MSEL15_0),
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PINMUX_DATA(MMCD0_6_PU_MARK,
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PORT277_FN1, PORT277_IN_PU, MSEL4CR_MSEL15_0),
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PINMUX_DATA(MMCD0_7_PU_MARK,
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PORT278_FN1, PORT278_IN_PU, MSEL4CR_MSEL15_0),
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PINMUX_DATA(FSIBISLD_PU_MARK, PORT39_FN1, PORT39_IN_PU),
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PINMUX_DATA(FSIACK_PU_MARK, PORT49_FN1, PORT49_IN_PU),
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PINMUX_DATA(FSIAILR_PU_MARK, PORT50_FN5, PORT50_IN_PU),
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@ -2236,6 +2262,14 @@ static struct pinmux_gpio pinmux_gpios[] = {
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GPIO_FN(SDHICMD2_PU),
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GPIO_FN(MMCCMD0_PU),
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GPIO_FN(MMCCMD1_PU),
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GPIO_FN(MMCD0_0_PU),
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GPIO_FN(MMCD0_1_PU),
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GPIO_FN(MMCD0_2_PU),
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GPIO_FN(MMCD0_3_PU),
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GPIO_FN(MMCD0_4_PU),
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GPIO_FN(MMCD0_5_PU),
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GPIO_FN(MMCD0_6_PU),
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GPIO_FN(MMCD0_7_PU),
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GPIO_FN(FSIACK_PU),
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GPIO_FN(FSIAILR_PU),
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GPIO_FN(FSIAIBT_PU),
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