forked from luck/tmp_suning_uos_patched
spi: spi_bfin: resequence DMA start/stop
Set correct baud for spi mmc and enable SPI only after DMA is started. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com> Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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62310e51ac
commit
07612e5f22
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@ -231,13 +231,13 @@ static int restore_state(struct driver_data *drv_data)
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dev_dbg(&drv_data->pdev->dev, "restoring spi ctl state\n");
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/* Load the registers */
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cs_deactive(drv_data, chip);
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write_BAUD(drv_data, chip->baud);
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chip->ctl_reg &= (~BIT_CTL_TIMOD);
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chip->ctl_reg |= (chip->width << 8);
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write_CTRL(drv_data, chip->ctl_reg);
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bfin_spi_enable(drv_data);
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cs_active(drv_data, chip);
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if (ret)
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dev_dbg(&drv_data->pdev->dev,
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@ -767,6 +767,7 @@ static void pump_transfers(unsigned long data)
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disable_dma(drv_data->dma_channel);
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clear_dma_irqstat(drv_data->dma_channel);
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bfin_spi_disable(drv_data);
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/* config dma channel */
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dev_dbg(&drv_data->pdev->dev, "doing dma transfer\n");
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@ -789,9 +790,6 @@ static void pump_transfers(unsigned long data)
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dev_dbg(&drv_data->pdev->dev,
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"doing autobuffer DMA out.\n");
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/* set SPI transfer mode */
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write_CTRL(drv_data, (cr | CFG_SPI_DMAWRITE));
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/* no irq in autobuffer mode */
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dma_config =
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(DMAFLOW_AUTO | RESTART | dma_width | DI_EN);
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@ -800,7 +798,13 @@ static void pump_transfers(unsigned long data)
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(unsigned long)drv_data->tx);
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enable_dma(drv_data->dma_channel);
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/* just return here, there can only be one transfer in this mode */
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/* start SPI transfer */
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write_CTRL(drv_data,
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(cr | CFG_SPI_DMAWRITE | BIT_CTL_ENABLE));
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/* just return here, there can only be one transfer
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* in this mode
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*/
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message->status = 0;
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giveback(drv_data);
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return;
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@ -811,9 +815,6 @@ static void pump_transfers(unsigned long data)
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/* set transfer mode, and enable SPI */
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dev_dbg(&drv_data->pdev->dev, "doing DMA in.\n");
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/* set SPI transfer mode */
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write_CTRL(drv_data, (cr | CFG_SPI_DMAREAD));
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/* clear tx reg soformer data is not shifted out */
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write_TDBR(drv_data, 0xFFFF);
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@ -827,12 +828,13 @@ static void pump_transfers(unsigned long data)
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(unsigned long)drv_data->rx);
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enable_dma(drv_data->dma_channel);
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/* start SPI transfer */
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write_CTRL(drv_data,
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(cr | CFG_SPI_DMAREAD | BIT_CTL_ENABLE));
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} else if (drv_data->tx != NULL) {
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dev_dbg(&drv_data->pdev->dev, "doing DMA out.\n");
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/* set SPI transfer mode */
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write_CTRL(drv_data, (cr | CFG_SPI_DMAWRITE));
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/* start dma */
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dma_enable_irq(drv_data->dma_channel);
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dma_config = (RESTART | dma_width | DI_EN);
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@ -840,6 +842,10 @@ static void pump_transfers(unsigned long data)
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set_dma_start_addr(drv_data->dma_channel,
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(unsigned long)drv_data->tx);
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enable_dma(drv_data->dma_channel);
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/* start SPI transfer */
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write_CTRL(drv_data,
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(cr | CFG_SPI_DMAWRITE | BIT_CTL_ENABLE));
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}
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} else {
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/* IO mode write then read */
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@ -1142,6 +1148,8 @@ static int setup(struct spi_device *spi)
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peripheral_request(ssel[spi->master->bus_num]
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[chip->chip_select_num-1], DRV_NAME);
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cs_deactive(drv_data, chip);
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return 0;
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}
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