forked from luck/tmp_suning_uos_patched
[ARM] nommu: add ARM7TDMI core support
This patch adds ARM7TDMI core support which has no cache and no CP15 register(no memory control unit). Signed-off-by: Hyok S. Choi <hyok.choi@samsung.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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@ -55,6 +55,7 @@ arch-$(CONFIG_CPU_32v3) :=-D__LINUX_ARM_ARCH__=3 -march=armv3
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# This selects how we optimise for the processor.
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tune-$(CONFIG_CPU_ARM610) :=-mtune=arm610
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tune-$(CONFIG_CPU_ARM710) :=-mtune=arm710
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tune-$(CONFIG_CPU_ARM7TDMI) :=-mtune=arm7tdmi
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tune-$(CONFIG_CPU_ARM720T) :=-mtune=arm7tdmi
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tune-$(CONFIG_CPU_ARM920T) :=-mtune=arm9tdmi
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tune-$(CONFIG_CPU_ARM922T) :=-mtune=arm9tdmi
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@ -25,6 +25,19 @@ config CPU_ARM610
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Say Y if you want support for the ARM610 processor.
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Otherwise, say N.
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# ARM7TDMI
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config CPU_ARM7TDMI
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bool "Support ARM7TDMI processor"
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select CPU_32v4T
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select CPU_ABRT_LV4T
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select CPU_CACHE_V4
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help
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A 32-bit RISC microprocessor based on the ARM7 processor core
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which has no memory control unit and cache.
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Say Y if you want support for the ARM7TDMI processor.
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Otherwise, say N.
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# ARM710
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config CPU_ARM710
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bool "Support ARM710 processor" if !ARCH_CLPS7500 && ARCH_RPC
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@ -46,6 +46,7 @@ obj-$(CONFIG_CPU_TLB_V6) += tlb-v6.o
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obj-$(CONFIG_CPU_ARM610) += proc-arm6_7.o
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obj-$(CONFIG_CPU_ARM710) += proc-arm6_7.o
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obj-$(CONFIG_CPU_ARM7TDMI) += proc-arm7tdmi.o
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obj-$(CONFIG_CPU_ARM720T) += proc-arm720.o
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obj-$(CONFIG_CPU_ARM920T) += proc-arm920.o
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obj-$(CONFIG_CPU_ARM922T) += proc-arm922.o
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249
arch/arm/mm/proc-arm7tdmi.S
Normal file
249
arch/arm/mm/proc-arm7tdmi.S
Normal file
@ -0,0 +1,249 @@
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/*
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* linux/arch/arm/mm/proc-arm7tdmi.S: utility functions for ARM7TDMI
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*
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* Copyright (C) 2003-2006 Hyok S. Choi <hyok.choi@samsung.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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*/
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#include <linux/linkage.h>
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#include <linux/init.h>
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#include <asm/assembler.h>
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#include <asm/asm-offsets.h>
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#include <asm/pgtable-hwdef.h>
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#include <asm/pgtable.h>
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#include <asm/procinfo.h>
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#include <asm/ptrace.h>
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.text
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/*
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* cpu_arm7tdmi_proc_init()
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* cpu_arm7tdmi_do_idle()
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* cpu_arm7tdmi_dcache_clean_area()
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* cpu_arm7tdmi_switch_mm()
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*
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* These are not required.
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*/
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ENTRY(cpu_arm7tdmi_proc_init)
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ENTRY(cpu_arm7tdmi_do_idle)
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ENTRY(cpu_arm7tdmi_dcache_clean_area)
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ENTRY(cpu_arm7tdmi_switch_mm)
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mov pc, lr
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/*
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* cpu_arm7tdmi_proc_fin()
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*/
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ENTRY(cpu_arm7tdmi_proc_fin)
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mov r0, #PSR_F_BIT | PSR_I_BIT | SVC_MODE
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msr cpsr_c, r0
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mov pc, lr
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/*
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* Function: cpu_arm7tdmi_reset(loc)
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* Params : loc(r0) address to jump to
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* Purpose : Sets up everything for a reset and jump to the location for soft reset.
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*/
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ENTRY(cpu_arm7tdmi_reset)
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mov pc, r0
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__INIT
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.type __arm7tdmi_setup, #function
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__arm7tdmi_setup:
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mov pc, lr
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.size __arm7tdmi_setup, . - __arm7tdmi_setup
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__INITDATA
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/*
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* Purpose : Function pointers used to access above functions - all calls
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* come through these
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*/
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.type arm7tdmi_processor_functions, #object
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ENTRY(arm7tdmi_processor_functions)
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.word v4t_late_abort
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.word cpu_arm7tdmi_proc_init
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.word cpu_arm7tdmi_proc_fin
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.word cpu_arm7tdmi_reset
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.word cpu_arm7tdmi_do_idle
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.word cpu_arm7tdmi_dcache_clean_area
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.word cpu_arm7tdmi_switch_mm
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.word 0 @ cpu_*_set_pte
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.size arm7tdmi_processor_functions, . - arm7tdmi_processor_functions
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.section ".rodata"
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.type cpu_arch_name, #object
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cpu_arch_name:
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.asciz "armv4t"
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.size cpu_arch_name, . - cpu_arch_name
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.type cpu_elf_name, #object
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cpu_elf_name:
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.asciz "v4"
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.size cpu_elf_name, . - cpu_elf_name
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.type cpu_arm7tdmi_name, #object
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cpu_arm7tdmi_name:
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.asciz "ARM7TDMI"
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.size cpu_arm7tdmi_name, . - cpu_arm7tdmi_name
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.type cpu_triscenda7_name, #object
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cpu_triscenda7_name:
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.asciz "Triscend-A7x"
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.size cpu_triscenda7_name, . - cpu_triscenda7_name
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.type cpu_at91_name, #object
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cpu_at91_name:
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.asciz "Atmel-AT91M40xxx"
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.size cpu_at91_name, . - cpu_at91_name
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.type cpu_s3c3410_name, #object
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cpu_s3c3410_name:
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.asciz "Samsung-S3C3410"
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.size cpu_s3c3410_name, . - cpu_s3c3410_name
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.type cpu_s3c44b0x_name, #object
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cpu_s3c44b0x_name:
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.asciz "Samsung-S3C44B0x"
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.size cpu_s3c44b0x_name, . - cpu_s3c44b0x_name
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.type cpu_s3c4510b, #object
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cpu_s3c4510b_name:
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.asciz "Samsung-S3C4510B"
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.size cpu_s3c4510b_name, . - cpu_s3c4510b_name
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.type cpu_s3c4530_name, #object
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cpu_s3c4530_name:
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.asciz "Samsung-S3C4530"
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.size cpu_s3c4530_name, . - cpu_s3c4530_name
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.type cpu_netarm_name, #object
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cpu_netarm_name:
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.asciz "NETARM"
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.size cpu_netarm_name, . - cpu_netarm_name
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.align
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.section ".proc.info.init", #alloc, #execinstr
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.type __arm7tdmi_proc_info, #object
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__arm7tdmi_proc_info:
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.long 0x41007700
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.long 0xfff8ff00
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.long 0
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.long 0
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b __arm7tdmi_setup
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.long cpu_arch_name
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.long cpu_elf_name
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.long HWCAP_SWP | HWCAP_26BIT
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.long cpu_arm7tdmi_name
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.long arm7tdmi_processor_functions
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.long 0
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.long 0
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.long v4_cache_fns
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.size __arm7tdmi_proc_info, . - __arm7dmi_proc_info
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.type __triscenda7_proc_info, #object
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__triscenda7_proc_info:
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.long 0x0001d2ff
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.long 0x0001ffff
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.long 0
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.long 0
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b __arm7tdmi_setup
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.long cpu_arch_name
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.long cpu_elf_name
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.long HWCAP_SWP | HWCAP_THUMB | HWCAP_26BIT
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.long cpu_triscenda7_name
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.long arm7tdmi_processor_functions
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.long 0
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.long 0
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.long v4_cache_fns
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.size __triscenda7_proc_info, . - __triscenda7_proc_info
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.type __at91_proc_info, #object
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__at91_proc_info:
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.long 0x14000040
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.long 0xfff000e0
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.long 0
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.long 0
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b __arm7tdmi_setup
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.long cpu_arch_name
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.long cpu_elf_name
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.long HWCAP_SWP | HWCAP_THUMB | HWCAP_26BIT
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.long cpu_at91_name
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.long arm7tdmi_processor_functions
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.long 0
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.long 0
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.long v4_cache_fns
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.size __at91_proc_info, . - __at91_proc_info
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.type __s3c4510b_proc_info, #object
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__s3c4510b_proc_info:
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.long 0x36365000
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.long 0xfffff000
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.long 0
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.long 0
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b __arm7tdmi_setup
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.long cpu_arch_name
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.long cpu_elf_name
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.long HWCAP_SWP | HWCAP_THUMB | HWCAP_26BIT
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.long cpu_s3c4510b_name
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.long arm7tdmi_processor_functions
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.long 0
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.long 0
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.long v4_cache_fns
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.size __s3c4510b_proc_info, . - __s3c4510b_proc_info
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.type __s3c4530_proc_info, #object
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__s3c4530_proc_info:
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.long 0x4c000000
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.long 0xfff000e0
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.long 0
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.long 0
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b __arm7tdmi_setup
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.long cpu_arch_name
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.long cpu_elf_name
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.long HWCAP_SWP | HWCAP_THUMB | HWCAP_26BIT
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.long cpu_s3c4530_name
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.long arm7tdmi_processor_functions
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.long 0
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.long 0
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.long v4_cache_fns
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.size __s3c4530_proc_info, . - __s3c4530_proc_info
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.type __s3c3410_proc_info, #object
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__s3c3410_proc_info:
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.long 0x34100000
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.long 0xffff0000
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.long 0
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.long 0
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b __arm7tdmi_setup
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.long cpu_arch_name
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.long cpu_elf_name
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.long HWCAP_SWP | HWCAP_THUMB | HWCAP_26BIT
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.long cpu_s3c3410_name
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.long arm7tdmi_processor_functions
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.long 0
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.long 0
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.long v4_cache_fns
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.size __s3c3410_proc_info, . - __s3c3410_proc_info
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.type __s3c44b0x_proc_info, #object
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__s3c44b0x_proc_info:
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.long 0x44b00000
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.long 0xffff0000
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.long 0
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.long 0
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b __arm7tdmi_setup
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.long cpu_arch_name
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.long cpu_elf_name
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.long HWCAP_SWP | HWCAP_THUMB | HWCAP_26BIT
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.long cpu_s3c44b0x_name
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.long arm7tdmi_processor_functions
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.long 0
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.long 0
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.long v4_cache_fns
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.size __s3c44b0x_proc_info, . - __s3c44b0x_proc_info
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@ -33,7 +33,7 @@
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# endif
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#endif
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#if defined(CONFIG_CPU_ARM720T)
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#if defined(CONFIG_CPU_ARM720T) || defined(CONFIG_CPU_ARM7TDMI)
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# ifdef _CACHE
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# define MULTI_CACHE 1
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# else
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# define CPU_NAME cpu_arm6
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# endif
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# endif
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# ifdef CONFIG_CPU_ARM7TDMI
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# ifdef CPU_NAME
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# undef MULTI_CPU
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# define MULTI_CPU
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# else
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# define CPU_NAME cpu_arm7tdmi
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# endif
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# endif
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# ifdef CONFIG_CPU_ARM710
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# ifdef CPU_NAME
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# undef MULTI_CPU
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