forked from luck/tmp_suning_uos_patched
ALSA: hda: Fix mismatches for register mask and value in hdac controller
E.g. for azx_int_enable(), we should set both mask and value to be "AZX_INT_CTRL_EN | AZX_INT_GLOBAL_EN"(the mask was 0) to enable controller CIE and GIE. We have similar issues on setting AZX_GCTL_RESET and AZX_GCTL_UNSOL, here try to correct all of them. Signed-off-by: Keyon Jie <yang.jie@linux.intel.com> Signed-off-by: Takashi Iwai <tiwai@suse.de>
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beae77170c
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081e01f059
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@ -376,7 +376,7 @@ void snd_hdac_bus_exit_link_reset(struct hdac_bus *bus)
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{
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unsigned long timeout;
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snd_hdac_chip_updateb(bus, GCTL, 0, AZX_GCTL_RESET);
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snd_hdac_chip_updateb(bus, GCTL, AZX_GCTL_RESET, AZX_GCTL_RESET);
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timeout = jiffies + msecs_to_jiffies(100);
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while (!snd_hdac_chip_readb(bus, GCTL) && time_before(jiffies, timeout))
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@ -415,7 +415,7 @@ int snd_hdac_bus_reset_link(struct hdac_bus *bus, bool full_reset)
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}
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/* Accept unsolicited responses */
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snd_hdac_chip_updatel(bus, GCTL, 0, AZX_GCTL_UNSOL);
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snd_hdac_chip_updatel(bus, GCTL, AZX_GCTL_UNSOL, AZX_GCTL_UNSOL);
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/* detect codecs */
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if (!bus->codec_mask) {
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@ -431,7 +431,9 @@ EXPORT_SYMBOL_GPL(snd_hdac_bus_reset_link);
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static void azx_int_enable(struct hdac_bus *bus)
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{
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/* enable controller CIE and GIE */
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snd_hdac_chip_updatel(bus, INTCTL, 0, AZX_INT_CTRL_EN | AZX_INT_GLOBAL_EN);
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snd_hdac_chip_updatel(bus, INTCTL,
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AZX_INT_CTRL_EN | AZX_INT_GLOBAL_EN,
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AZX_INT_CTRL_EN | AZX_INT_GLOBAL_EN);
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}
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/* disable interrupts */
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