From 53e82bc779b1702a3b99c6eb02399726039aaaa8 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Mon, 11 Sep 2017 00:36:53 +0200 Subject: [PATCH 1/3] dt-bindings: arm: actions: Add S700 and CubieBoard7 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Document the Actions Semi S700 SoC and the Cubietech CubieBoard7. Acked-by: Rob Herring Signed-off-by: Andreas Färber --- Documentation/devicetree/bindings/arm/actions.txt | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/actions.txt b/Documentation/devicetree/bindings/arm/actions.txt index ced764a8549e..544a8855fad5 100644 --- a/Documentation/devicetree/bindings/arm/actions.txt +++ b/Documentation/devicetree/bindings/arm/actions.txt @@ -25,6 +25,21 @@ Root node property compatible must contain, depending on board: - LeMaker Guitar Base Board rev. B: "lemaker,guitar-bb-rev-b", "lemaker,guitar" +S700 SoC +======== + +Required root node properties: + +- compatible : must contain "actions,s700" + + +Boards: + +Root node property compatible must contain, depending on board: + + - Cubietech CubieBoard7: "cubietech,cubieboard7" + + S900 SoC ======== From afc7e586048c97ad26aac65f12df02f3c82f44e4 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Sun, 10 Sep 2017 03:32:19 +0200 Subject: [PATCH 2/3] dt-bindings: power: Add Actions Semi S700 SPS MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Define power domains for Actions Semi S700 SoC Smart Power System (SPS). Acked-by: Rob Herring Signed-off-by: Andreas Färber --- .../bindings/power/actions,owl-sps.txt | 2 ++ .../dt-bindings/power/owl-s700-powergate.h | 19 +++++++++++++++++++ 2 files changed, 21 insertions(+) create mode 100644 include/dt-bindings/power/owl-s700-powergate.h diff --git a/Documentation/devicetree/bindings/power/actions,owl-sps.txt b/Documentation/devicetree/bindings/power/actions,owl-sps.txt index 007b9a7ae723..78edd63641e8 100644 --- a/Documentation/devicetree/bindings/power/actions,owl-sps.txt +++ b/Documentation/devicetree/bindings/power/actions,owl-sps.txt @@ -2,10 +2,12 @@ Actions Semi Owl Smart Power System (SPS) Required properties: - compatible : "actions,s500-sps" for S500 + "actions,s700-sps" for S700 - reg : Offset and length of the register set for the device. - #power-domain-cells : Must be 1. See macros in: include/dt-bindings/power/owl-s500-powergate.h for S500 + include/dt-bindings/power/owl-s700-powergate.h for S700 Example: diff --git a/include/dt-bindings/power/owl-s700-powergate.h b/include/dt-bindings/power/owl-s700-powergate.h new file mode 100644 index 000000000000..4cf1aefbf09c --- /dev/null +++ b/include/dt-bindings/power/owl-s700-powergate.h @@ -0,0 +1,19 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Actions Semi S700 SPS + * + * Copyright (c) 2017 Andreas Färber + */ +#ifndef DT_BINDINGS_POWER_OWL_S700_POWERGATE_H +#define DT_BINDINGS_POWER_OWL_S700_POWERGATE_H + +#define S700_PD_VDE 0 +#define S700_PD_VCE_SI 1 +#define S700_PD_USB2_1 2 +#define S700_PD_HDE 3 +#define S700_PD_DMA 4 +#define S700_PD_DS 5 +#define S700_PD_USB3 6 +#define S700_PD_USB2_0 7 + +#endif From 0bea2a65387961efcb59794a9fb7f9a63c6eb722 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Sun, 10 Sep 2017 01:53:43 +0200 Subject: [PATCH 3/3] arm64: dts: actions: Add S700 and CubieBoard7 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add Device Trees for S700 SoC and Cubietech CubieBoard7. Signed-off-by: Andreas Färber --- arch/arm64/boot/dts/actions/Makefile | 2 + .../boot/dts/actions/s700-cubieboard7.dts | 46 +++++ arch/arm64/boot/dts/actions/s700.dtsi | 169 ++++++++++++++++++ 3 files changed, 217 insertions(+) create mode 100644 arch/arm64/boot/dts/actions/s700-cubieboard7.dts create mode 100644 arch/arm64/boot/dts/actions/s700.dtsi diff --git a/arch/arm64/boot/dts/actions/Makefile b/arch/arm64/boot/dts/actions/Makefile index cc4661256356..d8b923480f5a 100644 --- a/arch/arm64/boot/dts/actions/Makefile +++ b/arch/arm64/boot/dts/actions/Makefile @@ -1 +1,3 @@ +dtb-$(CONFIG_ARCH_ACTIONS) += s700-cubieboard7.dtb + dtb-$(CONFIG_ARCH_ACTIONS) += s900-bubblegum-96.dtb diff --git a/arch/arm64/boot/dts/actions/s700-cubieboard7.dts b/arch/arm64/boot/dts/actions/s700-cubieboard7.dts new file mode 100644 index 000000000000..ef79d7905f44 --- /dev/null +++ b/arch/arm64/boot/dts/actions/s700-cubieboard7.dts @@ -0,0 +1,46 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2017 Andreas Färber + */ + +/dts-v1/; + +#include "s700.dtsi" + +/ { + compatible = "cubietech,cubieboard7", "actions,s700"; + model = "CubieBoard7"; + + aliases { + serial3 = &uart3; + }; + + chosen { + stdout-path = "serial3:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x0 0x0 0x80000000>; + }; + + memory@1,e0000000 { + device_type = "memory"; + reg = <0x1 0xe0000000 0x0 0x0>; + }; + + uart3_clk: uart3-clk { + compatible = "fixed-clock"; + clock-frequency = <921600>; + #clock-cells = <0>; + }; +}; + +&timer { + clocks = <&hosc>; +}; + +&uart3 { + status = "okay"; + clocks = <&uart3_clk>; +}; diff --git a/arch/arm64/boot/dts/actions/s700.dtsi b/arch/arm64/boot/dts/actions/s700.dtsi new file mode 100644 index 000000000000..66dd5309f0a2 --- /dev/null +++ b/arch/arm64/boot/dts/actions/s700.dtsi @@ -0,0 +1,169 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2017 Andreas Färber + */ + +#include + +/ { + compatible = "actions,s700"; + interrupt-parent = <&gic>; + #address-cells = <2>; + #size-cells = <2>; + + cpus { + #address-cells = <2>; + #size-cells = <0>; + + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x0>; + enable-method = "psci"; + }; + + cpu1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x1>; + enable-method = "psci"; + }; + + cpu2: cpu@2 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x2>; + enable-method = "psci"; + }; + + cpu3: cpu@3 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x3>; + enable-method = "psci"; + }; + }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + secmon@1f000000 { + reg = <0x0 0x1f000000 0x0 0x1000000>; + no-map; + }; + }; + + psci { + compatible = "arm,psci-0.2"; + method = "smc"; + }; + + arm-pmu { + compatible = "arm,cortex-a53-pmu"; + interrupts = , + , + , + ; + interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = , + , + , + ; + }; + + hosc: hosc { + compatible = "fixed-clock"; + clock-frequency = <24000000>; + #clock-cells = <0>; + }; + + soc { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + gic: interrupt-controller@e00f1000 { + compatible = "arm,gic-400"; + reg = <0x0 0xe00f1000 0x0 0x1000>, + <0x0 0xe00f2000 0x0 0x2000>, + <0x0 0xe00f4000 0x0 0x2000>, + <0x0 0xe00f6000 0x0 0x2000>; + interrupts = ; + interrupt-controller; + #interrupt-cells = <3>; + }; + + uart0: serial@e0120000 { + compatible = "actions,s900-uart", "actions,owl-uart"; + reg = <0x0 0xe0120000 0x0 0x2000>; + interrupts = ; + status = "disabled"; + }; + + uart1: serial@e0122000 { + compatible = "actions,s900-uart", "actions,owl-uart"; + reg = <0x0 0xe0122000 0x0 0x2000>; + interrupts = ; + status = "disabled"; + }; + + uart2: serial@e0124000 { + compatible = "actions,s900-uart", "actions,owl-uart"; + reg = <0x0 0xe0124000 0x0 0x2000>; + interrupts = ; + status = "disabled"; + }; + + uart3: serial@e0126000 { + compatible = "actions,s900-uart", "actions,owl-uart"; + reg = <0x0 0xe0126000 0x0 0x2000>; + interrupts = ; + status = "disabled"; + }; + + uart4: serial@e0128000 { + compatible = "actions,s900-uart", "actions,owl-uart"; + reg = <0x0 0xe0128000 0x0 0x2000>; + interrupts = ; + status = "disabled"; + }; + + uart5: serial@e012a000 { + compatible = "actions,s900-uart", "actions,owl-uart"; + reg = <0x0 0xe012a000 0x0 0x2000>; + interrupts = ; + status = "disabled"; + }; + + uart6: serial@e012c000 { + compatible = "actions,s900-uart", "actions,owl-uart"; + reg = <0x0 0xe012c000 0x0 0x2000>; + interrupts = ; + status = "disabled"; + }; + + sps: power-controller@e01b0100 { + compatible = "actions,s700-sps"; + reg = <0x0 0xe01b0100 0x0 0x100>; + #power-domain-cells = <1>; + }; + + timer: timer@e024c000 { + compatible = "actions,s700-timer"; + reg = <0x0 0xe024c000 0x0 0x4000>; + interrupts = ; + interrupt-names = "timer1"; + }; + }; +};