forked from luck/tmp_suning_uos_patched
[PATCH] bcm43xx: some IRQ handler cleanups.
Signed-off-by: Michael Buesch <mbuesch@freenet.de> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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6ab5b8e670
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0ac59daee5
@ -1785,10 +1785,6 @@ static void bcm43xx_interrupt_tasklet(struct bcm43xx_private *bcm)
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bcmirq_handled(BCM43xx_IRQ_XMIT_STATUS);
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}
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/* We get spurious IRQs, althought they are masked.
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* Assume they are void and ignore them.
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*/
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bcmirq_handled(~(bcm->irq_savedstate));
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/* IRQ_PIO_WORKAROUND is handled in the top-half. */
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bcmirq_handled(BCM43xx_IRQ_PIO_WORKAROUND);
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#ifdef CONFIG_BCM43XX_DEBUG
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@ -1809,41 +1805,31 @@ static void bcm43xx_interrupt_tasklet(struct bcm43xx_private *bcm)
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bcm43xx_unlock_mmio(bcm, flags);
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}
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static void bcm43xx_interrupt_ack(struct bcm43xx_private *bcm,
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u32 reason, u32 mask)
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static void pio_irq_workaround(struct bcm43xx_private *bcm,
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u16 base, int queueidx)
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{
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bcm->dma_reason[0] = bcm43xx_read32(bcm, BCM43xx_MMIO_DMA1_REASON)
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& 0x0001dc00;
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bcm->dma_reason[1] = bcm43xx_read32(bcm, BCM43xx_MMIO_DMA2_REASON)
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& 0x0000dc00;
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bcm->dma_reason[2] = bcm43xx_read32(bcm, BCM43xx_MMIO_DMA3_REASON)
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& 0x0000dc00;
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bcm->dma_reason[3] = bcm43xx_read32(bcm, BCM43xx_MMIO_DMA4_REASON)
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& 0x0001dc00;
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u16 rxctl;
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rxctl = bcm43xx_read16(bcm, base + BCM43xx_PIO_RXCTL);
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if (rxctl & BCM43xx_PIO_RXCTL_DATAAVAILABLE)
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bcm->dma_reason[queueidx] |= BCM43xx_DMAIRQ_RX_DONE;
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else
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bcm->dma_reason[queueidx] &= ~BCM43xx_DMAIRQ_RX_DONE;
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}
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static void bcm43xx_interrupt_ack(struct bcm43xx_private *bcm, u32 reason)
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{
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if (bcm43xx_using_pio(bcm) &&
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(bcm->current_core->rev < 3) &&
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(!(reason & BCM43xx_IRQ_PIO_WORKAROUND))) {
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/* Apply a PIO specific workaround to the dma_reasons */
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#define apply_pio_workaround(BASE, QNUM) \
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do { \
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if (bcm43xx_read16(bcm, BASE + BCM43xx_PIO_RXCTL) & BCM43xx_PIO_RXCTL_DATAAVAILABLE) \
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bcm->dma_reason[QNUM] |= 0x00010000; \
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else \
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bcm->dma_reason[QNUM] &= ~0x00010000; \
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} while (0)
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apply_pio_workaround(BCM43xx_MMIO_PIO1_BASE, 0);
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apply_pio_workaround(BCM43xx_MMIO_PIO2_BASE, 1);
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apply_pio_workaround(BCM43xx_MMIO_PIO3_BASE, 2);
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apply_pio_workaround(BCM43xx_MMIO_PIO4_BASE, 3);
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#undef apply_pio_workaround
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pio_irq_workaround(bcm, BCM43xx_MMIO_PIO1_BASE, 0);
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pio_irq_workaround(bcm, BCM43xx_MMIO_PIO2_BASE, 1);
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pio_irq_workaround(bcm, BCM43xx_MMIO_PIO3_BASE, 2);
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pio_irq_workaround(bcm, BCM43xx_MMIO_PIO4_BASE, 3);
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}
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bcm43xx_write32(bcm, BCM43xx_MMIO_GEN_IRQ_REASON,
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reason & mask);
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bcm43xx_write32(bcm, BCM43xx_MMIO_GEN_IRQ_REASON, reason);
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bcm43xx_write32(bcm, BCM43xx_MMIO_DMA1_REASON,
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bcm->dma_reason[0]);
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@ -1860,7 +1846,7 @@ static irqreturn_t bcm43xx_interrupt_handler(int irq, void *dev_id, struct pt_re
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{
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irqreturn_t ret = IRQ_HANDLED;
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struct bcm43xx_private *bcm = dev_id;
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u32 reason, mask;
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u32 reason;
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if (!bcm)
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return IRQ_NONE;
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@ -1873,11 +1859,20 @@ static irqreturn_t bcm43xx_interrupt_handler(int irq, void *dev_id, struct pt_re
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ret = IRQ_NONE;
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goto out;
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}
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mask = bcm43xx_read32(bcm, BCM43xx_MMIO_GEN_IRQ_MASK);
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if (!(reason & mask))
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reason &= bcm43xx_read32(bcm, BCM43xx_MMIO_GEN_IRQ_MASK);
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if (!reason)
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goto out;
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bcm43xx_interrupt_ack(bcm, reason, mask);
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bcm->dma_reason[0] = bcm43xx_read32(bcm, BCM43xx_MMIO_DMA1_REASON)
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& 0x0001dc00;
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bcm->dma_reason[1] = bcm43xx_read32(bcm, BCM43xx_MMIO_DMA2_REASON)
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& 0x0000dc00;
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bcm->dma_reason[2] = bcm43xx_read32(bcm, BCM43xx_MMIO_DMA3_REASON)
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& 0x0000dc00;
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bcm->dma_reason[3] = bcm43xx_read32(bcm, BCM43xx_MMIO_DMA4_REASON)
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& 0x0001dc00;
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bcm43xx_interrupt_ack(bcm, reason);
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/* Only accept IRQs, if we are initialized properly.
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* This avoids an RX race while initializing.
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