forked from luck/tmp_suning_uos_patched
irqchip/gic: Remove redundant gic_set_irqchip_flags
Now that the GIC chip implementation enables IRQCHIP_SKIP_SET_WAKE and IRQCHIP_MASK_ON_SUSPEND by default, the platforms requiring them need not override the irqchip flags as before. This patch removes all the users of gic_set_irqchip_flags and the function itself. Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Simon Horman <horms@verge.net.au> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Magnus Damm <magnus.damm@gmail.com> Cc: Gregory CLEMENT <gregory.clement@free-electrons.com> Cc: Geert Uytterhoeven <geert@linux-m68k.org> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: linux-arm-kernel@lists.infradead.org Link: http://lkml.kernel.org/r/1436971109-20189-2-git-send-email-sudeep.holla@arm.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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@ -313,7 +313,6 @@ void __init sh73a0_init_irq(void)
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void __iomem *gic_cpu_base = IOMEM(0xf0000100);
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void __iomem *intevtsa = ioremap_nocache(0xffd20100, PAGE_SIZE);
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gic_set_irqchip_flags(IRQCHIP_SKIP_SET_WAKE);
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gic_init(0, 29, gic_dist_base, gic_cpu_base);
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register_intc_controller(&intcs_desc);
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@ -719,7 +719,6 @@ void __init r8a7779_init_irq_dt(void)
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void __iomem *gic_dist_base = ioremap_nocache(0xf0001000, 0x1000);
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void __iomem *gic_cpu_base = ioremap_nocache(0xf0000100, 0x1000);
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#endif
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gic_set_irqchip_flags(IRQCHIP_SKIP_SET_WAKE);
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#ifdef CONFIG_ARCH_SHMOBILE_LEGACY
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gic_init(0, 29, gic_dist_base, gic_cpu_base);
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@ -56,7 +56,6 @@ void __init ux500_init_irq(void)
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struct device_node *np;
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struct resource r;
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gic_set_irqchip_flags(IRQCHIP_SKIP_SET_WAKE | IRQCHIP_MASK_ON_SUSPEND);
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irqchip_init();
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np = of_find_compatible_node(NULL, NULL, "stericsson,db8500-prcmu");
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of_address_to_resource(np, 0, &r);
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@ -186,7 +186,6 @@ static void __init zynq_map_io(void)
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static void __init zynq_irq_init(void)
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{
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gic_set_irqchip_flags(IRQCHIP_SKIP_SET_WAKE | IRQCHIP_MASK_ON_SUSPEND);
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irqchip_init();
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}
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@ -881,11 +881,6 @@ static const struct irq_domain_ops gic_irq_domain_ops = {
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.xlate = gic_irq_domain_xlate,
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};
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void gic_set_irqchip_flags(unsigned long flags)
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{
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gic_chip.flags |= flags;
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}
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void __init gic_init_bases(unsigned int gic_nr, int irq_start,
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void __iomem *dist_base, void __iomem *cpu_base,
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u32 percpu_offset, struct device_node *node)
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@ -95,7 +95,6 @@
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struct device_node;
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void gic_set_irqchip_flags(unsigned long flags);
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void gic_init_bases(unsigned int, int, void __iomem *, void __iomem *,
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u32 offset, struct device_node *);
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void gic_cascade_irq(unsigned int gic_nr, unsigned int irq);
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