forked from luck/tmp_suning_uos_patched
sh: Convert IPR-IRQ to IRQ chip.
One more initial conversion.. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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@ -1,11 +1,10 @@
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/*
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* arch/sh/kernel/cpu/irq/ipr.c
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* Interrupt handling for IPR-based IRQ.
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*
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* Copyright (C) 1999 Niibe Yutaka & Takeshi Yaegashi
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* Copyright (C) 2000 Kazumoto Kojima
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* Copyright (C) 2003 Takashi Kusuda <kusuda-takashi@hitachi-ul.co.jp>
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*
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* Interrupt handling for IPR-based IRQ.
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* Copyright (C) 2003 Takashi Kusuda <kusuda-takashi@hitachi-ul.co.jp>
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* Copyright (C) 2006 Paul Mundt
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*
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* Supported system:
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* On-chip supporting modules (TMU, RTC, etc.).
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@ -13,12 +12,13 @@
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* Hitachi SolutionEngine external I/O:
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* MS7709SE01, MS7709ASE01, and MS7750SE01
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <linux/init.h>
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#include <linux/irq.h>
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#include <linux/module.h>
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#include <asm/system.h>
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#include <asm/io.h>
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#include <asm/machvec.h>
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@ -28,93 +28,45 @@ struct ipr_data {
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int shift; /* Shifts of the 16-bit data */
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int priority; /* The priority */
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};
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static struct ipr_data ipr_data[NR_IRQS];
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static void enable_ipr_irq(unsigned int irq);
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static void disable_ipr_irq(unsigned int irq);
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/* shutdown is same as "disable" */
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#define shutdown_ipr_irq disable_ipr_irq
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static void mask_and_ack_ipr(unsigned int);
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static void end_ipr_irq(unsigned int irq);
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static unsigned int startup_ipr_irq(unsigned int irq)
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{
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enable_ipr_irq(irq);
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return 0; /* never anything pending */
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}
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static struct hw_interrupt_type ipr_irq_type = {
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.typename = "IPR-IRQ",
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.startup = startup_ipr_irq,
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.shutdown = shutdown_ipr_irq,
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.enable = enable_ipr_irq,
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.disable = disable_ipr_irq,
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.ack = mask_and_ack_ipr,
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.end = end_ipr_irq
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};
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static void disable_ipr_irq(unsigned int irq)
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{
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unsigned long val;
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unsigned int addr = ipr_data[irq].addr;
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unsigned short mask = 0xffff ^ (0x0f << ipr_data[irq].shift);
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struct ipr_data *p = get_irq_chip_data(irq);
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/* Set the priority in IPR to 0 */
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val = ctrl_inw(addr);
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val &= mask;
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ctrl_outw(val, addr);
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ctrl_outw(ctrl_inw(p->addr) & (0xffff ^ (0xf << p->shift)), p->addr);
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}
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static void enable_ipr_irq(unsigned int irq)
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{
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unsigned long val;
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unsigned int addr = ipr_data[irq].addr;
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int priority = ipr_data[irq].priority;
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unsigned short value = (priority << ipr_data[irq].shift);
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struct ipr_data *p = get_irq_chip_data(irq);
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/* Set priority in IPR back to original value */
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val = ctrl_inw(addr);
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val |= value;
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ctrl_outw(val, addr);
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ctrl_outw(ctrl_inw(p->addr) | (p->priority << p->shift), p->addr);
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}
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static void mask_and_ack_ipr(unsigned int irq)
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{
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disable_ipr_irq(irq);
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#if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709) || \
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defined(CONFIG_CPU_SUBTYPE_SH7706) || \
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defined(CONFIG_CPU_SUBTYPE_SH7300) || defined(CONFIG_CPU_SUBTYPE_SH7705)
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/* This is needed when we use edge triggered setting */
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/* XXX: Is it really needed? */
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if (IRQ0_IRQ <= irq && irq <= IRQ5_IRQ) {
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/* Clear external interrupt request */
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int a = ctrl_inb(INTC_IRR0);
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a &= ~(1 << (irq - IRQ0_IRQ));
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ctrl_outb(a, INTC_IRR0);
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}
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#endif
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}
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static void end_ipr_irq(unsigned int irq)
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{
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if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
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enable_ipr_irq(irq);
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}
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static struct irq_chip ipr_irq_chip = {
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.name = "ipr",
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.mask = disable_ipr_irq,
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.unmask = enable_ipr_irq,
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.mask_ack = disable_ipr_irq,
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};
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void make_ipr_irq(unsigned int irq, unsigned int addr, int pos, int priority)
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{
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disable_irq_nosync(irq);
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ipr_data[irq].addr = addr;
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ipr_data[irq].shift = pos*4; /* POSition (0-3) x 4 means shift */
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ipr_data[irq].priority = priority;
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struct ipr_data ipr_data;
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irq_desc[irq].chip = &ipr_irq_type;
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disable_ipr_irq(irq);
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disable_irq_nosync(irq);
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ipr_data.addr = addr;
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ipr_data.shift = pos*4; /* POSition (0-3) x 4 means shift */
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ipr_data.priority = priority;
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set_irq_chip_and_handler(irq, &ipr_irq_chip, handle_level_irq);
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set_irq_chip_data(irq, &ipr_data);
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enable_ipr_irq(irq);
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}
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/* XXX: This needs to die a horrible death.. */
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void __init init_IRQ(void)
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{
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#ifndef CONFIG_CPU_SUBTYPE_SH7780
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