AcoSail/kernel_optimize_test
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ARCv2: support loop buffer (LPB) disabling

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On HS cores, loop buffer (LPB) is programmable in runtime and can
be optionally disabled.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
This commit is contained in:
Eugeniy Paltsev 2020-06-04 20:39:25 +03:00 committed by Vineet Gupta
parent 040ece2a3c
commit 10011f7d95
2 changed files with 14 additions and 0 deletions
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6
arch/arc/Kconfig
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@ -474,6 +474,12 @@ config ARC_IRQ_NO_AUTOSAVE
This is programmable and can be optionally disabled in which case
software INTERRUPT_PROLOGUE/EPILGUE do the needed work
config ARC_LPB_DISABLE
bool "Disable loop buffer (LPB)"
help
On HS cores, loop buffer (LPB) is programmable in runtime and can
be optionally disabled.
endif # ISA_ARCV2
endmenu # "ARC CPU Configuration"

8
arch/arc/kernel/head.S
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@ -59,6 +59,14 @@
bclr r5, r5, STATUS_AD_BIT
#endif
kflag r5
#ifdef CONFIG_ARC_LPB_DISABLE
lr r5, [ARC_REG_LPB_BUILD]
breq r5, 0, 1f ; LPB doesn't exist
mov r5, 1
sr r5, [ARC_REG_LPB_CTRL]
1:
#endif /* CONFIG_ARC_LPB_DISABLE */
#endif
; Config DSP_CTRL properly, so kernel may use integer multiply,
; multiply-accumulate, and divide operations