forked from luck/tmp_suning_uos_patched
arm64: perf: Allow more than one cycle counter to be used
Currently: $ perf stat -e cycles:u -e cycles:k true Performance counter stats for 'true': 2,24,699 cycles:u <not counted> cycles:k (0.00%) 0.000788087 seconds time elapsed We can not count more than one cycle counter in one instance,because we allow to map cycle counter into PMCCNTR_EL0 only. However, if I did not miss anything then specification do not prohibit to use PMEVCNTR<n>_EL0 for cycle count as well. Modify the code so that it still prefers to use PMCCNTR_EL0 for cycle counter, however allow to use PMEVCNTR<n>_EL0 if PMCCNTR_EL0 is already in use. After this patch: $ perf stat -e cycles:u -e cycles:k true Performance counter stats for 'true': 2,17,310 cycles:u 7,40,009 cycles:k 0.000764149 seconds time elapsed Signed-off-by: Pratyush Anand <panand@redhat.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
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@ -846,17 +846,14 @@ static int armv8pmu_get_event_idx(struct pmu_hw_events *cpuc,
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struct hw_perf_event *hwc = &event->hw;
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unsigned long evtype = hwc->config_base & ARMV8_PMU_EVTYPE_EVENT;
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/* Always place a cycle counter into the cycle counter. */
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/* Always prefer to place a cycle counter into the cycle counter. */
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if (evtype == ARMV8_PMUV3_PERFCTR_CPU_CYCLES) {
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if (test_and_set_bit(ARMV8_IDX_CYCLE_COUNTER, cpuc->used_mask))
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return -EAGAIN;
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return ARMV8_IDX_CYCLE_COUNTER;
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if (!test_and_set_bit(ARMV8_IDX_CYCLE_COUNTER, cpuc->used_mask))
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return ARMV8_IDX_CYCLE_COUNTER;
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}
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/*
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* For anything other than a cycle counter, try and use
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* the events counters
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* Otherwise use events counters
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*/
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for (idx = ARMV8_IDX_COUNTER0; idx < cpu_pmu->num_events; ++idx) {
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if (!test_and_set_bit(idx, cpuc->used_mask))
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