forked from luck/tmp_suning_uos_patched
[ARM] 3327/1: S3C2410 - add osiris machine support
Patch from Ben Dooks Support for Simtec IM2440D20 CPU modules (Osiris) Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Ben Dooks
Russell King
parent
a61ea9326d
commit
110d322b29
@ -9,6 +9,13 @@ config MACH_ANUBIS
|
||||
Say Y gere if you are using the Simtec Electronics ANUBIS
|
||||
development system
|
||||
|
||||
config MACH_OSIRIS
|
||||
bool "Simtec IM2440D20 (OSIRIS) module"
|
||||
select CPU_S3C2440
|
||||
help
|
||||
Say Y here if you are using the Simtec IM2440D20 module, also
|
||||
known as the Osiris.
|
||||
|
||||
config ARCH_BAST
|
||||
bool "Simtec Electronics BAST (EB2410ITX)"
|
||||
select CPU_S3C2410
|
||||
|
||||
@ -38,6 +38,7 @@ obj-$(CONFIG_BAST_PC104_IRQ) += bast-irq.o
|
||||
# machine specific support
|
||||
|
||||
obj-$(CONFIG_MACH_ANUBIS) += mach-anubis.o
|
||||
obj-$(CONFIG_MACH_OSIRIS) += mach-osiris.o
|
||||
obj-$(CONFIG_ARCH_BAST) += mach-bast.o usb-simtec.o
|
||||
obj-$(CONFIG_ARCH_H1940) += mach-h1940.o
|
||||
obj-$(CONFIG_MACH_N30) += mach-n30.o
|
||||
|
||||
290
arch/arm/mach-s3c2410/mach-osiris.c
Normal file
290
arch/arm/mach-s3c2410/mach-osiris.c
Normal file
@ -0,0 +1,290 @@
|
||||
/* linux/arch/arm/mach-s3c2410/mach-osiris.c
|
||||
*
|
||||
* Copyright (c) 2005 Simtec Electronics
|
||||
* http://armlinux.simtec.co.uk/
|
||||
* Ben Dooks <ben@simtec.co.uk>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/types.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/list.h>
|
||||
#include <linux/timer.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/device.h>
|
||||
|
||||
#include <asm/mach/arch.h>
|
||||
#include <asm/mach/map.h>
|
||||
#include <asm/mach/irq.h>
|
||||
|
||||
#include <asm/arch/osiris-map.h>
|
||||
#include <asm/arch/osiris-cpld.h>
|
||||
|
||||
#include <asm/hardware.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/irq.h>
|
||||
#include <asm/mach-types.h>
|
||||
|
||||
#include <asm/arch/regs-serial.h>
|
||||
#include <asm/arch/regs-gpio.h>
|
||||
#include <asm/arch/regs-mem.h>
|
||||
#include <asm/arch/regs-lcd.h>
|
||||
#include <asm/arch/nand.h>
|
||||
|
||||
#include <linux/mtd/mtd.h>
|
||||
#include <linux/mtd/nand.h>
|
||||
#include <linux/mtd/nand_ecc.h>
|
||||
#include <linux/mtd/partitions.h>
|
||||
|
||||
#include "clock.h"
|
||||
#include "devs.h"
|
||||
#include "cpu.h"
|
||||
|
||||
/* onboard perihpheral map */
|
||||
|
||||
static struct map_desc osiris_iodesc[] __initdata = {
|
||||
/* ISA IO areas (may be over-written later) */
|
||||
|
||||
{
|
||||
.virtual = (u32)S3C24XX_VA_ISA_BYTE,
|
||||
.pfn = __phys_to_pfn(S3C2410_CS5),
|
||||
.length = SZ_16M,
|
||||
.type = MT_DEVICE,
|
||||
}, {
|
||||
.virtual = (u32)S3C24XX_VA_ISA_WORD,
|
||||
.pfn = __phys_to_pfn(S3C2410_CS5),
|
||||
.length = SZ_16M,
|
||||
.type = MT_DEVICE,
|
||||
},
|
||||
|
||||
/* CPLD control registers */
|
||||
|
||||
{
|
||||
.virtual = (u32)OSIRIS_VA_CTRL1,
|
||||
.pfn = __phys_to_pfn(OSIRIS_PA_CTRL1),
|
||||
.length = SZ_16K,
|
||||
.type = MT_DEVICE
|
||||
}, {
|
||||
.virtual = (u32)OSIRIS_VA_CTRL2,
|
||||
.pfn = __phys_to_pfn(OSIRIS_PA_CTRL2),
|
||||
.length = SZ_16K,
|
||||
.type = MT_DEVICE
|
||||
},
|
||||
};
|
||||
|
||||
#define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
|
||||
#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
|
||||
#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
|
||||
|
||||
static struct s3c24xx_uart_clksrc osiris_serial_clocks[] = {
|
||||
[0] = {
|
||||
.name = "uclk",
|
||||
.divisor = 1,
|
||||
.min_baud = 0,
|
||||
.max_baud = 0,
|
||||
},
|
||||
[1] = {
|
||||
.name = "pclk",
|
||||
.divisor = 1,
|
||||
.min_baud = 0,
|
||||
.max_baud = 0.
|
||||
}
|
||||
};
|
||||
|
||||
|
||||
static struct s3c2410_uartcfg osiris_uartcfgs[] = {
|
||||
[0] = {
|
||||
.hwport = 0,
|
||||
.flags = 0,
|
||||
.ucon = UCON,
|
||||
.ulcon = ULCON,
|
||||
.ufcon = UFCON,
|
||||
.clocks = osiris_serial_clocks,
|
||||
.clocks_size = ARRAY_SIZE(osiris_serial_clocks)
|
||||
},
|
||||
[1] = {
|
||||
.hwport = 2,
|
||||
.flags = 0,
|
||||
.ucon = UCON,
|
||||
.ulcon = ULCON,
|
||||
.ufcon = UFCON,
|
||||
.clocks = osiris_serial_clocks,
|
||||
.clocks_size = ARRAY_SIZE(osiris_serial_clocks)
|
||||
},
|
||||
};
|
||||
|
||||
/* NAND Flash on Osiris board */
|
||||
|
||||
static int external_map[] = { 2 };
|
||||
static int chip0_map[] = { 0 };
|
||||
static int chip1_map[] = { 1 };
|
||||
|
||||
struct mtd_partition osiris_default_nand_part[] = {
|
||||
[0] = {
|
||||
.name = "Boot Agent",
|
||||
.size = SZ_16K,
|
||||
.offset = 0
|
||||
},
|
||||
[1] = {
|
||||
.name = "/boot",
|
||||
.size = SZ_4M - SZ_16K,
|
||||
.offset = SZ_16K,
|
||||
},
|
||||
[2] = {
|
||||
.name = "user1",
|
||||
.offset = SZ_4M,
|
||||
.size = SZ_32M - SZ_4M,
|
||||
},
|
||||
[3] = {
|
||||
.name = "user2",
|
||||
.offset = SZ_32M,
|
||||
.size = MTDPART_SIZ_FULL,
|
||||
}
|
||||
};
|
||||
|
||||
/* the Osiris has 3 selectable slots for nand-flash, the two
|
||||
* on-board chip areas, as well as the external slot.
|
||||
*
|
||||
* Note, there is no current hot-plug support for the External
|
||||
* socket.
|
||||
*/
|
||||
|
||||
static struct s3c2410_nand_set osiris_nand_sets[] = {
|
||||
[1] = {
|
||||
.name = "External",
|
||||
.nr_chips = 1,
|
||||
.nr_map = external_map,
|
||||
.nr_partitions = ARRAY_SIZE(osiris_default_nand_part),
|
||||
.partitions = osiris_default_nand_part
|
||||
},
|
||||
[0] = {
|
||||
.name = "chip0",
|
||||
.nr_chips = 1,
|
||||
.nr_map = chip0_map,
|
||||
.nr_partitions = ARRAY_SIZE(osiris_default_nand_part),
|
||||
.partitions = osiris_default_nand_part
|
||||
},
|
||||
[2] = {
|
||||
.name = "chip1",
|
||||
.nr_chips = 1,
|
||||
.nr_map = chip1_map,
|
||||
.nr_partitions = ARRAY_SIZE(osiris_default_nand_part),
|
||||
.partitions = osiris_default_nand_part
|
||||
},
|
||||
};
|
||||
|
||||
static void osiris_nand_select(struct s3c2410_nand_set *set, int slot)
|
||||
{
|
||||
unsigned int tmp;
|
||||
|
||||
slot = set->nr_map[slot] & 3;
|
||||
|
||||
pr_debug("osiris_nand: selecting slot %d (set %p,%p)\n",
|
||||
slot, set, set->nr_map);
|
||||
|
||||
tmp = __raw_readb(OSIRIS_VA_CTRL1);
|
||||
tmp &= ~OSIRIS_CTRL1_NANDSEL;
|
||||
tmp |= slot;
|
||||
|
||||
pr_debug("osiris_nand: ctrl1 now %02x\n", tmp);
|
||||
|
||||
__raw_writeb(tmp, OSIRIS_VA_CTRL1);
|
||||
}
|
||||
|
||||
static struct s3c2410_platform_nand osiris_nand_info = {
|
||||
.tacls = 25,
|
||||
.twrph0 = 60,
|
||||
.twrph1 = 60,
|
||||
.nr_sets = ARRAY_SIZE(osiris_nand_sets),
|
||||
.sets = osiris_nand_sets,
|
||||
.select_chip = osiris_nand_select,
|
||||
};
|
||||
|
||||
/* PCMCIA control and configuration */
|
||||
|
||||
static struct resource osiris_pcmcia_resource[] = {
|
||||
[0] = {
|
||||
.start = 0x0f000000,
|
||||
.end = 0x0f100000,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 0x0c000000,
|
||||
.end = 0x0c100000,
|
||||
.flags = IORESOURCE_MEM,
|
||||
}
|
||||
};
|
||||
|
||||
static struct platform_device osiris_pcmcia = {
|
||||
.name = "osiris-pcmcia",
|
||||
.id = -1,
|
||||
.num_resources = ARRAY_SIZE(osiris_pcmcia_resource),
|
||||
.resource = osiris_pcmcia_resource,
|
||||
};
|
||||
|
||||
/* Standard Osiris devices */
|
||||
|
||||
static struct platform_device *osiris_devices[] __initdata = {
|
||||
&s3c_device_i2c,
|
||||
&s3c_device_nand,
|
||||
&osiris_pcmcia,
|
||||
};
|
||||
|
||||
static struct clk *osiris_clocks[] = {
|
||||
&s3c24xx_dclk0,
|
||||
&s3c24xx_dclk1,
|
||||
&s3c24xx_clkout0,
|
||||
&s3c24xx_clkout1,
|
||||
&s3c24xx_uclk,
|
||||
};
|
||||
|
||||
static struct s3c24xx_board osiris_board __initdata = {
|
||||
.devices = osiris_devices,
|
||||
.devices_count = ARRAY_SIZE(osiris_devices),
|
||||
.clocks = osiris_clocks,
|
||||
.clocks_count = ARRAY_SIZE(osiris_clocks)
|
||||
};
|
||||
|
||||
void __init osiris_map_io(void)
|
||||
{
|
||||
/* initialise the clocks */
|
||||
|
||||
s3c24xx_dclk0.parent = NULL;
|
||||
s3c24xx_dclk0.rate = 12*1000*1000;
|
||||
|
||||
s3c24xx_dclk1.parent = NULL;
|
||||
s3c24xx_dclk1.rate = 24*1000*1000;
|
||||
|
||||
s3c24xx_clkout0.parent = &s3c24xx_dclk0;
|
||||
s3c24xx_clkout1.parent = &s3c24xx_dclk1;
|
||||
|
||||
s3c24xx_uclk.parent = &s3c24xx_clkout1;
|
||||
|
||||
s3c_device_nand.dev.platform_data = &osiris_nand_info;
|
||||
|
||||
s3c24xx_init_io(osiris_iodesc, ARRAY_SIZE(osiris_iodesc));
|
||||
s3c24xx_init_clocks(0);
|
||||
s3c24xx_init_uarts(osiris_uartcfgs, ARRAY_SIZE(osiris_uartcfgs));
|
||||
s3c24xx_set_board(&osiris_board);
|
||||
|
||||
/* fix bus configuration (nBE settings wrong on ABLE pre v2.20) */
|
||||
__raw_writel(__raw_readl(S3C2410_BWSCON) | S3C2410_BWSCON_ST1 | S3C2410_BWSCON_ST2 | S3C2410_BWSCON_ST3 | S3C2410_BWSCON_ST4 | S3C2410_BWSCON_ST5, S3C2410_BWSCON);
|
||||
|
||||
/* write-protect line to the NAND */
|
||||
s3c2410_gpio_setpin(S3C2410_GPA0, 1);
|
||||
}
|
||||
|
||||
MACHINE_START(OSIRIS, "Simtec-OSIRIS")
|
||||
/* Maintainer: Ben Dooks <ben@simtec.co.uk> */
|
||||
.phys_ram = S3C2410_SDRAM_PA,
|
||||
.phys_io = S3C2410_PA_UART,
|
||||
.io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc,
|
||||
.boot_params = S3C2410_SDRAM_PA + 0x100,
|
||||
.map_io = osiris_map_io,
|
||||
.init_irq = s3c24xx_init_irq,
|
||||
.timer = &s3c24xx_timer,
|
||||
MACHINE_END
|
||||
25
include/asm-arm/arch-s3c2410/osiris-cpld.h
Normal file
25
include/asm-arm/arch-s3c2410/osiris-cpld.h
Normal file
@ -0,0 +1,25 @@
|
||||
/* linux/include/asm-arm/arch-s3c2410/osiris-cpld.h
|
||||
*
|
||||
* (c) 2005 Simtec Electronics
|
||||
* http://www.simtec.co.uk/products/
|
||||
* Ben Dooks <ben@simtec.co.uk>
|
||||
*
|
||||
* OSIRIS - CPLD control constants
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#ifndef __ASM_ARCH_OSIRISCPLD_H
|
||||
#define __ASM_ARCH_OSIRISCPLD_H
|
||||
|
||||
/* CTRL1 - NAND WP control */
|
||||
|
||||
#define OSIRIS_CTRL1_NANDSEL (0x3)
|
||||
#define OSIRIS_CTRL1_BOOT_INT (1<<3)
|
||||
#define OSIRIS_CTRL1_PCMCIA (1<<4)
|
||||
#define OSIRIS_CTRL1_PCMCIA_nWAIT (1<<6)
|
||||
#define OSIRIS_CTRL1_PCMCIA_nIOIS16 (1<<7)
|
||||
|
||||
#endif /* __ASM_ARCH_OSIRISCPLD_H */
|
||||
41
include/asm-arm/arch-s3c2410/osiris-map.h
Normal file
41
include/asm-arm/arch-s3c2410/osiris-map.h
Normal file
@ -0,0 +1,41 @@
|
||||
/* linux/include/asm-arm/arch-s3c2410/osiris-map.h
|
||||
*
|
||||
* (c) 2005 Simtec Electronics
|
||||
* http://www.simtec.co.uk/products/
|
||||
* Ben Dooks <ben@simtec.co.uk>
|
||||
*
|
||||
* OSIRIS - Memory map definitions
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* Changelog:
|
||||
*/
|
||||
|
||||
/* needs arch/map.h including with this */
|
||||
|
||||
#ifndef __ASM_ARCH_OSIRISMAP_H
|
||||
#define __ASM_ARCH_OSIRISMAP_H
|
||||
|
||||
/* start peripherals off after the S3C2410 */
|
||||
|
||||
#define OSIRIS_IOADDR(x) (S3C2410_ADDR((x) + 0x05000000))
|
||||
|
||||
#define OSIRIS_PA_CPLD (S3C2410_CS1 | (3<<25))
|
||||
|
||||
/* we put the CPLD registers next, to get them out of the way */
|
||||
|
||||
#define OSIRIS_VA_CTRL1 OSIRIS_IOADDR(0x00000000) /* 0x01300000 */
|
||||
#define OSIRIS_PA_CTRL1 (OSIRIS_PA_CPLD)
|
||||
|
||||
#define OSIRIS_VA_CTRL2 OSIRIS_IOADDR(0x00100000) /* 0x01400000 */
|
||||
#define OSIRIS_PA_CTRL2 (OSIRIS_PA_CPLD + (1<<24))
|
||||
|
||||
#define OSIRIS_VA_CTRL3 OSIRIS_IOADDR(0x00200000) /* 0x01500000 */
|
||||
#define OSIRIS_PA_CTRL3 (OSIRIS_PA_CPLD + (2<<24))
|
||||
|
||||
#define OSIRIS_VA_CTRL4 OSIRIS_IOADDR(0x00300000) /* 0x01600000 */
|
||||
#define OSIRIS_PA_CTRL4 (OSIRIS_PA_CPLD + (3<<24))
|
||||
|
||||
#endif /* __ASM_ARCH_OSIRISMAP_H */
|
||||
Loading…
Reference in New Issue
Block a user