forked from luck/tmp_suning_uos_patched
perf, x86: Enable Nehalem-EX support
According to Intel Software Devel Manual Volume 3B, the Nehalem-EX PMU is just like regular Nehalem (except for the uncore support, which is completely different). Signed-off-by: Vince Weaver <vweaver1@eecs.utk.edu> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: Paul Mackerras <paulus@samba.org> Cc: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Arjan van de Ven <arjan@linux.intel.com> Cc: Lin Ming <ming.m.lin@intel.com> LKML-Reference: <alpine.DEB.2.00.1004060956580.1417@cl320.eecs.utk.edu> Signed-off-by: Ingo Molnar <mingo@elte.hu>
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@ -936,6 +936,7 @@ static __init int intel_pmu_init(void)
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case 26: /* 45 nm nehalem, "Bloomfield" */
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case 30: /* 45 nm nehalem, "Lynnfield" */
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case 46: /* 45 nm nehalem-ex, "Beckton" */
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memcpy(hw_cache_event_ids, nehalem_hw_cache_event_ids,
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sizeof(hw_cache_event_ids));
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