forked from luck/tmp_suning_uos_patched
arm64: drop redundant macros from read_cpuid()
asm/cputype.h contains a bunch of #defines for CPU id registers that essentially map to themselves. Remove the #defines and pass the tokens directly to the inline asm() that reads the registers. Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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@ -16,23 +16,13 @@
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#ifndef __ASM_CPUTYPE_H
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#define __ASM_CPUTYPE_H
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#define ID_MIDR_EL1 "midr_el1"
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#define ID_MPIDR_EL1 "mpidr_el1"
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#define ID_CTR_EL0 "ctr_el0"
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#define ID_AA64PFR0_EL1 "id_aa64pfr0_el1"
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#define ID_AA64DFR0_EL1 "id_aa64dfr0_el1"
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#define ID_AA64AFR0_EL1 "id_aa64afr0_el1"
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#define ID_AA64ISAR0_EL1 "id_aa64isar0_el1"
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#define ID_AA64MMFR0_EL1 "id_aa64mmfr0_el1"
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#define INVALID_HWID ULONG_MAX
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#define MPIDR_HWID_BITMASK 0xff00ffffff
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#define read_cpuid(reg) ({ \
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u64 __val; \
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asm("mrs %0, " reg : "=r" (__val)); \
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asm("mrs %0, " #reg : "=r" (__val)); \
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__val; \
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})
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@ -54,12 +44,12 @@
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*/
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static inline u32 __attribute_const__ read_cpuid_id(void)
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{
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return read_cpuid(ID_MIDR_EL1);
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return read_cpuid(MIDR_EL1);
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}
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static inline u64 __attribute_const__ read_cpuid_mpidr(void)
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{
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return read_cpuid(ID_MPIDR_EL1);
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return read_cpuid(MPIDR_EL1);
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}
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static inline unsigned int __attribute_const__ read_cpuid_implementor(void)
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@ -74,7 +64,7 @@ static inline unsigned int __attribute_const__ read_cpuid_part_number(void)
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static inline u32 __attribute_const__ read_cpuid_cachetype(void)
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{
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return read_cpuid(ID_CTR_EL0);
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return read_cpuid(CTR_EL0);
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}
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#endif /* __ASSEMBLY__ */
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