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dt-bindings: power: add Amlogic secure power domains bindings

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Add the bindings for the Amlogic Secure power domains, controlling the
secure power domains.

The bindings targets the Amlogic A1 and C1 compatible SoCs, in which the
power domain registers are in secure world.

Signed-off-by: Jianxin Pan <jianxin.pan@amlogic.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/1579087831-94965-3-git-send-email-jianxin.pan@amlogic.com
This commit is contained in:
Jianxin Pan 2020-01-15 19:30:29 +08:00 committed by Kevin Hilman
parent fe98d0ff5d
commit 165b5fb294
2 changed files with 72 additions and 0 deletions
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40
Documentation/devicetree/bindings/power/amlogic,meson-sec-pwrc.yaml Normal file
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# SPDX-License-Identifier: (GPL-2.0+ OR MIT)
# Copyright (c) 2019 Amlogic, Inc
# Author: Jianxin Pan <jianxin.pan@amlogic.com>
%YAML 1.2
---
$id: "http://devicetree.org/schemas/power/amlogic,meson-sec-pwrc.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
title: Amlogic Meson Secure Power Domains
maintainers:
- Jianxin Pan <jianxin.pan@amlogic.com>
description: |+
Secure Power Domains used in Meson A1/C1 SoCs, and should be the child node
of secure-monitor.
properties:
compatible:
enum:
- amlogic,meson-a1-pwrc
"#power-domain-cells":
const: 1
required:
- compatible
- "#power-domain-cells"
examples:
- |
secure-monitor {
compatible = "amlogic,meson-gxbb-sm";
pwrc: power-controller {
compatible = "amlogic,meson-a1-pwrc";
#power-domain-cells = <1>;
};
}

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include/dt-bindings/power/meson-a1-power.h Normal file
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/* SPDX-License-Identifier: (GPL-2.0+ or MIT) */
/*
* Copyright (c) 2019 Amlogic, Inc.
* Author: Jianxin Pan <jianxin.pan@amlogic.com>
*/
#ifndef _DT_BINDINGS_MESON_A1_POWER_H
#define _DT_BINDINGS_MESON_A1_POWER_H
#define PWRC_DSPA_ID 8
#define PWRC_DSPB_ID 9
#define PWRC_UART_ID 10
#define PWRC_DMC_ID 11
#define PWRC_I2C_ID 12
#define PWRC_PSRAM_ID 13
#define PWRC_ACODEC_ID 14
#define PWRC_AUDIO_ID 15
#define PWRC_OTP_ID 16
#define PWRC_DMA_ID 17
#define PWRC_SD_EMMC_ID 18
#define PWRC_RAMA_ID 19
#define PWRC_RAMB_ID 20
#define PWRC_IR_ID 21
#define PWRC_SPICC_ID 22
#define PWRC_SPIFC_ID 23
#define PWRC_USB_ID 24
#define PWRC_NIC_ID 25
#define PWRC_PDMIN_ID 26
#define PWRC_RSA_ID 27
#define PWRC_MAX_ID 28
#endif