forked from luck/tmp_suning_uos_patched
i2c-eg20t: support new device OKI SEMICONDUCTOR ML7213 IOH
Support new device OKI SEMICONDUCTOR ML7213 IOH. The ML7213 which is for IVI(In-Vehicle Infotainment) is a companion chip for the Atom E6xx series and compatible with the Intel EG20T PCH. Signed-off-by: Tomoya MORINAGA <tomoya-linux@dsn.okisemi.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
This commit is contained in:
Tomoya MORINAGA
Ben Dooks
parent
493f3358cb
commit
173442f278
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@ -639,12 +639,15 @@ config I2C_XILINX
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will be called xilinx_i2c.
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config I2C_EG20T
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tristate "PCH I2C of Intel EG20T"
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depends on PCI
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help
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This driver is for PCH(Platform controller Hub) I2C of EG20T which
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is an IOH(Input/Output Hub) for x86 embedded processor.
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This driver can access PCH I2C bus device.
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tristate "Intel EG20T PCH/OKI SEMICONDUCTOR ML7213 IOH"
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depends on PCI
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help
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This driver is for PCH(Platform controller Hub) I2C of EG20T which
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is an IOH(Input/Output Hub) for x86 embedded processor.
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This driver can access PCH I2C bus device.
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This driver also supports the ML7213, a companion chip for the
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Atom E6xx series and compatible with the Intel EG20T PCH.
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comment "External I2C/SMBus adapter drivers"
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@ -131,6 +131,13 @@
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#define pch_pci_dbg(pdev, fmt, arg...) \
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dev_dbg(&pdev->dev, "%s :" fmt, __func__, ##arg)
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/*
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Set the number of I2C instance max
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Intel EG20T PCH : 1ch
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OKI SEMICONDUCTOR ML7213 IOH : 2ch
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*/
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#define PCH_I2C_MAX_DEV 2
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/**
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* struct i2c_algo_pch_data - for I2C driver functionalities
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* @pch_adapter: stores the reference to i2c_adapter structure
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@ -155,12 +162,14 @@ struct i2c_algo_pch_data {
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* @pch_data: stores a list of i2c_algo_pch_data
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* @pch_i2c_suspended: specifies whether the system is suspended or not
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* perhaps with more lines and words.
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* @ch_num: specifies the number of i2c instance
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*
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* pch_data has as many elements as maximum I2C channels
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*/
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struct adapter_info {
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struct i2c_algo_pch_data pch_data;
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struct i2c_algo_pch_data pch_data[PCH_I2C_MAX_DEV];
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bool pch_i2c_suspended;
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int ch_num;
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};
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@ -169,8 +178,13 @@ static int pch_clk = 50000; /* specifies I2C clock speed in KHz */
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static wait_queue_head_t pch_event;
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static DEFINE_MUTEX(pch_mutex);
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/* Definition for ML7213 by OKI SEMICONDUCTOR */
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#define PCI_VENDOR_ID_ROHM 0x10DB
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#define PCI_DEVICE_ID_ML7213_I2C 0x802D
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static struct pci_device_id __devinitdata pch_pcidev_id[] = {
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{PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_PCH_I2C)},
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{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_PCH_I2C), 1, },
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{ PCI_VDEVICE(ROHM, PCI_DEVICE_ID_ML7213_I2C), 2, },
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{0,}
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};
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@ -211,8 +225,7 @@ static void pch_i2c_init(struct i2c_algo_pch_data *adap)
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/* Initialize I2C registers */
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iowrite32(0x21, p + PCH_I2CNF);
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pch_setbit(adap->pch_base_address, PCH_I2CCTL,
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PCH_I2CCTL_I2CMEN);
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pch_setbit(adap->pch_base_address, PCH_I2CCTL, PCH_I2CCTL_I2CMEN);
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if (pch_i2c_speed != 400)
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pch_i2c_speed = 100;
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@ -254,7 +267,7 @@ static inline bool ktime_lt(const ktime_t cmp1, const ktime_t cmp2)
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* @timeout: waiting time counter (us).
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*/
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static s32 pch_i2c_wait_for_bus_idle(struct i2c_algo_pch_data *adap,
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s32 timeout)
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s32 timeout)
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{
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void __iomem *p = adap->pch_base_address;
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@ -474,8 +487,8 @@ static void pch_i2c_sendnack(struct i2c_algo_pch_data *adap)
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* @last: specifies whether last message or not.
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* @first: specifies whether first message or not.
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*/
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s32 pch_i2c_readbytes(struct i2c_adapter *i2c_adap, struct i2c_msg *msgs,
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u32 last, u32 first)
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static s32 pch_i2c_readbytes(struct i2c_adapter *i2c_adap, struct i2c_msg *msgs,
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u32 last, u32 first)
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{
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struct i2c_algo_pch_data *adap = i2c_adap->algo_data;
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@ -568,10 +581,10 @@ s32 pch_i2c_readbytes(struct i2c_adapter *i2c_adap, struct i2c_msg *msgs,
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}
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/**
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* pch_i2c_cb_ch0() - Interrupt handler Call back function
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* pch_i2c_cb() - Interrupt handler Call back function
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* @adap: Pointer to struct i2c_algo_pch_data.
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*/
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static void pch_i2c_cb_ch0(struct i2c_algo_pch_data *adap)
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static void pch_i2c_cb(struct i2c_algo_pch_data *adap)
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{
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u32 sts;
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void __iomem *p = adap->pch_base_address;
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@ -599,24 +612,30 @@ static void pch_i2c_cb_ch0(struct i2c_algo_pch_data *adap)
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*/
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static irqreturn_t pch_i2c_handler(int irq, void *pData)
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{
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s32 reg_val;
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u32 reg_val;
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int flag;
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int i;
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struct adapter_info *adap_info = pData;
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void __iomem *p;
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u32 mode;
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struct i2c_algo_pch_data *adap_data = (struct i2c_algo_pch_data *)pData;
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void __iomem *p = adap_data->pch_base_address;
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u32 mode = ioread32(p + PCH_I2CMOD) & (BUFFER_MODE | EEPROM_SR_MODE);
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if (mode != NORMAL_MODE) {
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pch_err(adap_data, "I2C mode is not supported\n");
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return IRQ_NONE;
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for (i = 0, flag = 0; i < adap_info->ch_num; i++) {
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p = adap_info->pch_data[i].pch_base_address;
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mode = ioread32(p + PCH_I2CMOD);
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mode &= BUFFER_MODE | EEPROM_SR_MODE;
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if (mode != NORMAL_MODE) {
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pch_err(adap_info->pch_data,
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"I2C-%d mode(%d) is not supported\n", mode, i);
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continue;
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}
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reg_val = ioread32(p + PCH_I2CSR);
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if (reg_val & (I2CMAL_BIT | I2CMCF_BIT | I2CMIF_BIT)) {
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pch_i2c_cb(&adap_info->pch_data[i]);
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flag = 1;
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}
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}
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reg_val = ioread32(p + PCH_I2CSR);
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if (reg_val & (I2CMAL_BIT | I2CMCF_BIT | I2CMIF_BIT))
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pch_i2c_cb_ch0(adap_data);
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else
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return IRQ_NONE;
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return IRQ_HANDLED;
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return flag ? IRQ_HANDLED : IRQ_NONE;
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}
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/**
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@ -626,7 +645,7 @@ static irqreturn_t pch_i2c_handler(int irq, void *pData)
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* @num: number of messages.
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*/
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static s32 pch_i2c_xfer(struct i2c_adapter *i2c_adap,
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struct i2c_msg *msgs, s32 num)
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struct i2c_msg *msgs, s32 num)
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{
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struct i2c_msg *pmsg;
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u32 i = 0;
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@ -709,11 +728,13 @@ static void pch_i2c_disbl_int(struct i2c_algo_pch_data *adap)
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}
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static int __devinit pch_i2c_probe(struct pci_dev *pdev,
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const struct pci_device_id *id)
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const struct pci_device_id *id)
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{
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void __iomem *base_addr;
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s32 ret;
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int ret;
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int i, j;
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struct adapter_info *adap_info;
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struct i2c_adapter *pch_adap;
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pch_pci_dbg(pdev, "Entered.\n");
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@ -743,44 +764,48 @@ static int __devinit pch_i2c_probe(struct pci_dev *pdev,
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goto err_pci_iomap;
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}
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adap_info->pch_i2c_suspended = false;
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/* Set the number of I2C channel instance */
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adap_info->ch_num = id->driver_data;
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adap_info->pch_data.p_adapter_info = adap_info;
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for (i = 0; i < adap_info->ch_num; i++) {
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pch_adap = &adap_info->pch_data[i].pch_adapter;
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adap_info->pch_i2c_suspended = false;
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adap_info->pch_data.pch_adapter.owner = THIS_MODULE;
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adap_info->pch_data.pch_adapter.class = I2C_CLASS_HWMON;
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strcpy(adap_info->pch_data.pch_adapter.name, KBUILD_MODNAME);
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adap_info->pch_data.pch_adapter.algo = &pch_algorithm;
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adap_info->pch_data.pch_adapter.algo_data =
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&adap_info->pch_data;
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adap_info->pch_data[i].p_adapter_info = adap_info;
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/* (i * 0x80) + base_addr; */
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adap_info->pch_data.pch_base_address = base_addr;
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pch_adap->owner = THIS_MODULE;
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pch_adap->class = I2C_CLASS_HWMON;
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strcpy(pch_adap->name, KBUILD_MODNAME);
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pch_adap->algo = &pch_algorithm;
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pch_adap->algo_data = &adap_info->pch_data[i];
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adap_info->pch_data.pch_adapter.dev.parent = &pdev->dev;
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/* base_addr + offset; */
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adap_info->pch_data[i].pch_base_address = base_addr + 0x100 * i;
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ret = i2c_add_adapter(&(adap_info->pch_data.pch_adapter));
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pch_adap->dev.parent = &pdev->dev;
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if (ret) {
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pch_pci_err(pdev, "i2c_add_adapter FAILED\n");
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goto err_i2c_add_adapter;
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ret = i2c_add_adapter(pch_adap);
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if (ret) {
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pch_pci_err(pdev, "i2c_add_adapter[ch:%d] FAILED\n", i);
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goto err_i2c_add_adapter;
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}
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pch_i2c_init(&adap_info->pch_data[i]);
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}
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pch_i2c_init(&adap_info->pch_data);
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ret = request_irq(pdev->irq, pch_i2c_handler, IRQF_SHARED,
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KBUILD_MODNAME, &adap_info->pch_data);
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KBUILD_MODNAME, adap_info);
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if (ret) {
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pch_pci_err(pdev, "request_irq FAILED\n");
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goto err_request_irq;
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goto err_i2c_add_adapter;
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}
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pci_set_drvdata(pdev, adap_info);
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pch_pci_dbg(pdev, "returns %d.\n", ret);
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return 0;
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err_request_irq:
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i2c_del_adapter(&(adap_info->pch_data.pch_adapter));
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err_i2c_add_adapter:
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for (j = 0; j < i; j++)
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i2c_del_adapter(&adap_info->pch_data[j].pch_adapter);
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pci_iounmap(pdev, base_addr);
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err_pci_iomap:
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pci_release_regions(pdev);
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@ -793,17 +818,22 @@ static int __devinit pch_i2c_probe(struct pci_dev *pdev,
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static void __devexit pch_i2c_remove(struct pci_dev *pdev)
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{
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int i;
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struct adapter_info *adap_info = pci_get_drvdata(pdev);
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pch_i2c_disbl_int(&adap_info->pch_data);
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free_irq(pdev->irq, &adap_info->pch_data);
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i2c_del_adapter(&(adap_info->pch_data.pch_adapter));
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free_irq(pdev->irq, adap_info);
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if (adap_info->pch_data.pch_base_address) {
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pci_iounmap(pdev, adap_info->pch_data.pch_base_address);
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adap_info->pch_data.pch_base_address = 0;
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for (i = 0; i < adap_info->ch_num; i++) {
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pch_i2c_disbl_int(&adap_info->pch_data[i]);
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i2c_del_adapter(&adap_info->pch_data[i].pch_adapter);
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}
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if (adap_info->pch_data[0].pch_base_address)
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pci_iounmap(pdev, adap_info->pch_data[0].pch_base_address);
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for (i = 0; i < adap_info->ch_num; i++)
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adap_info->pch_data[i].pch_base_address = 0;
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pci_set_drvdata(pdev, NULL);
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pci_release_regions(pdev);
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@ -816,17 +846,22 @@ static void __devexit pch_i2c_remove(struct pci_dev *pdev)
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static int pch_i2c_suspend(struct pci_dev *pdev, pm_message_t state)
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{
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int ret;
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int i;
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struct adapter_info *adap_info = pci_get_drvdata(pdev);
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void __iomem *p = adap_info->pch_data.pch_base_address;
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void __iomem *p = adap_info->pch_data[0].pch_base_address;
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adap_info->pch_i2c_suspended = true;
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while ((adap_info->pch_data.pch_i2c_xfer_in_progress)) {
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/* Wait until all channel transfers are completed */
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msleep(20);
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for (i = 0; i < adap_info->ch_num; i++) {
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while ((adap_info->pch_data[i].pch_i2c_xfer_in_progress)) {
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/* Wait until all channel transfers are completed */
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msleep(20);
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}
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}
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/* Disable the i2c interrupts */
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pch_i2c_disbl_int(&adap_info->pch_data);
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for (i = 0; i < adap_info->ch_num; i++)
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pch_i2c_disbl_int(&adap_info->pch_data[i]);
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pch_pci_dbg(pdev, "I2CSR = %x I2CBUFSTA = %x I2CESRSTA = %x "
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"invoked function pch_i2c_disbl_int successfully\n",
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@ -849,6 +884,7 @@ static int pch_i2c_suspend(struct pci_dev *pdev, pm_message_t state)
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static int pch_i2c_resume(struct pci_dev *pdev)
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{
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int i;
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struct adapter_info *adap_info = pci_get_drvdata(pdev);
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pci_set_power_state(pdev, PCI_D0);
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@ -861,7 +897,8 @@ static int pch_i2c_resume(struct pci_dev *pdev)
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pci_enable_wake(pdev, PCI_D3hot, 0);
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pch_i2c_init(&adap_info->pch_data);
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for (i = 0; i < adap_info->ch_num; i++)
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pch_i2c_init(&adap_info->pch_data[i]);
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adap_info->pch_i2c_suspended = false;
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@ -893,7 +930,7 @@ static void __exit pch_pci_exit(void)
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}
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module_exit(pch_pci_exit);
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MODULE_DESCRIPTION("PCH I2C PCI Driver");
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MODULE_DESCRIPTION("Intel EG20T PCH/OKI SEMICONDUCTOR ML7213 IOH I2C Driver");
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MODULE_LICENSE("GPL");
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MODULE_AUTHOR("Tomoya MORINAGA. <tomoya-linux@dsn.okisemi.com>");
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module_param(pch_i2c_speed, int, (S_IRUSR | S_IWUSR));
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