forked from luck/tmp_suning_uos_patched
dt-bindings: power: Add rpmh power-domain bindings for SM8150
Add RPMH power-domain bindings for the SM8150 family of SoCs. Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Rajendra Nayak <rnayak@codeaurora.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Sibi Sankar <sibis@codeaurora.org> Link: https://lore.kernel.org/r/0101016e7f99ad2b-2bce2fac-2f02-4b3f-ac64-09942f7251ea-000000@us-west-2.amazonses.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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@ -10,6 +10,7 @@ Required Properties:
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* qcom,msm8998-rpmpd: RPM Power domain for the msm8998 family of SoC
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* qcom,qcs404-rpmpd: RPM Power domain for the qcs404 family of SoC
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* qcom,sdm845-rpmhpd: RPMh Power domain for the sdm845 family of SoC
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* qcom,sm8150-rpmhpd: RPMh Power domain for the sm8150 family of SoC
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- #power-domain-cells: number of cells in Power domain specifier
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must be 1.
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- operating-points-v2: Phandle to the OPP table for the Power domain.
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@ -15,12 +15,26 @@
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#define SDM845_GFX 7
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#define SDM845_MSS 8
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/* SM8150 Power Domain Indexes */
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#define SM8150_MSS 0
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#define SM8150_EBI 1
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#define SM8150_LMX 2
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#define SM8150_LCX 3
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#define SM8150_GFX 4
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#define SM8150_MX 5
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#define SM8150_MX_AO 6
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#define SM8150_CX 7
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#define SM8150_CX_AO 8
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#define SM8150_MMCX 9
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#define SM8150_MMCX_AO 10
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/* SDM845 Power Domain performance levels */
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#define RPMH_REGULATOR_LEVEL_RETENTION 16
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#define RPMH_REGULATOR_LEVEL_MIN_SVS 48
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#define RPMH_REGULATOR_LEVEL_LOW_SVS 64
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#define RPMH_REGULATOR_LEVEL_SVS 128
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#define RPMH_REGULATOR_LEVEL_SVS_L1 192
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#define RPMH_REGULATOR_LEVEL_SVS_L2 224
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#define RPMH_REGULATOR_LEVEL_NOM 256
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#define RPMH_REGULATOR_LEVEL_NOM_L1 320
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#define RPMH_REGULATOR_LEVEL_NOM_L2 336
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