forked from luck/tmp_suning_uos_patched
forcedeth: fix irq clearing and napi spin lock changes
This patch clears the irqstatus register with the exact same events it has read from it. Since the read-write operation is not atomic, a new irqstatus bit could have been set in between these operations and would then be cleared accidentally. Secondly, we now don't need any spin lock protection when scheduling/completing napi poll as the isr will not execute anymore (as we turn off all interrupts now). Signed-off-by: Ayaz Abdulla <aabdulla@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -3464,10 +3464,10 @@ static irqreturn_t nv_nic_irq(int foo, void *data)
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if (!(np->msi_flags & NV_MSI_X_ENABLED)) {
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np->events = readl(base + NvRegIrqStatus);
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writel(NVREG_IRQSTAT_MASK, base + NvRegIrqStatus);
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writel(np->events, base + NvRegIrqStatus);
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} else {
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np->events = readl(base + NvRegMSIXIrqStatus);
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writel(NVREG_IRQSTAT_MASK, base + NvRegMSIXIrqStatus);
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writel(np->events, base + NvRegMSIXIrqStatus);
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}
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dprintk(KERN_DEBUG "%s: irq: %08x\n", dev->name, np->events);
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if (!(np->events & np->irqmask))
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@ -3476,15 +3476,12 @@ static irqreturn_t nv_nic_irq(int foo, void *data)
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nv_msi_workaround(np);
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#ifdef CONFIG_FORCEDETH_NAPI
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spin_lock(&np->lock);
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napi_schedule(&np->napi);
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/* Disable furthur irq's
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(msix not enabled with napi) */
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writel(0, base + NvRegIrqMask);
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spin_unlock(&np->lock);
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#else
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do
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{
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@ -3568,10 +3565,10 @@ static irqreturn_t nv_nic_irq_optimized(int foo, void *data)
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if (!(np->msi_flags & NV_MSI_X_ENABLED)) {
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np->events = readl(base + NvRegIrqStatus);
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writel(NVREG_IRQSTAT_MASK, base + NvRegIrqStatus);
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writel(np->events, base + NvRegIrqStatus);
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} else {
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np->events = readl(base + NvRegMSIXIrqStatus);
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writel(NVREG_IRQSTAT_MASK, base + NvRegMSIXIrqStatus);
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writel(np->events, base + NvRegMSIXIrqStatus);
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}
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dprintk(KERN_DEBUG "%s: irq: %08x\n", dev->name, np->events);
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if (!(np->events & np->irqmask))
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@ -3580,15 +3577,12 @@ static irqreturn_t nv_nic_irq_optimized(int foo, void *data)
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nv_msi_workaround(np);
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#ifdef CONFIG_FORCEDETH_NAPI
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spin_lock(&np->lock);
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napi_schedule(&np->napi);
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/* Disable furthur irq's
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(msix not enabled with napi) */
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writel(0, base + NvRegIrqMask);
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spin_unlock(&np->lock);
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#else
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do
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{
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@ -3758,13 +3752,9 @@ static int nv_napi_poll(struct napi_struct *napi, int budget)
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if (rx_work < budget) {
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/* re-enable interrupts
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(msix not enabled in napi) */
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spin_lock_irqsave(&np->lock, flags);
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__napi_complete(napi);
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writel(np->irqmask, base + NvRegIrqMask);
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spin_unlock_irqrestore(&np->lock, flags);
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}
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return rx_work;
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}
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