AcoSail/kernel_optimize_test
8
0
Fork 0
forked from luck/tmp_suning_uos_patched
Code Pull Requests Activity

m68knommu: clean up ColdFire 527x interrupt setup

Browse Source 
With the common intc-2 interrupt controller code in place the ColdFire
527x family startup code can be greatly simplified. Remove all the
interrupt masking code, and the per-device interrupt config here.

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
This commit is contained in:
Greg Ungerer 2009-04-28 10:57:36 +10:00
parent 2fba4f0b03
commit 1b718c71b7
1 changed files with 0 additions and 49 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

49
arch/m68knommu/platform/527x/config.c
View File

@ -116,23 +116,13 @@ static struct platform_device *m527x_devices[] __initdata = {
/***************************************************************************/
#define INTC0 (MCF_MBAR + MCFICM_INTC0)
static void __init m527x_uart_init_line(int line, int irq)
{
u16 sepmask;
u32 imr;
if ((line < 0) || (line > 2))
return;
/* level 6, line based priority */
writeb(0x30+line, INTC0 + MCFINTC_ICR0 + MCFINT_UART0 + line);
imr = readl(INTC0 + MCFINTC_IMRL);
imr &= ~((1 << (irq - MCFINT_VECBASE)) | 1);
writel(imr, INTC0 + MCFINTC_IMRL);
/*
* External Pin Mask Setting & Enable External Pin for Interface
*/
@ -157,32 +147,11 @@ static void __init m527x_uarts_init(void)
/***************************************************************************/
static void __init m527x_fec_irq_init(int nr)
{
unsigned long base;
u32 imr;
base = MCF_IPSBAR + (nr ? MCFICM_INTC1 : MCFICM_INTC0);
writeb(0x28, base + MCFINTC_ICR0 + 23);
writeb(0x27, base + MCFINTC_ICR0 + 27);
writeb(0x26, base + MCFINTC_ICR0 + 29);
imr = readl(base + MCFINTC_IMRH);
imr &= ~0xf;
writel(imr, base + MCFINTC_IMRH);
imr = readl(base + MCFINTC_IMRL);
imr &= ~0xff800001;
writel(imr, base + MCFINTC_IMRL);
}
static void __init m527x_fec_init(void)
{
u16 par;
u8 v;
m527x_fec_irq_init(0);
/* Set multi-function pins to ethernet mode for fec0 */
#if defined(CONFIG_M5271)
v = readb(MCF_IPSBAR + 0x100047);
@ -195,8 +164,6 @@ static void __init m527x_fec_init(void)
#endif
#ifdef CONFIG_FEC2
m527x_fec_irq_init(1);
/* Set multi-function pins to ethernet mode for fec1 */
par = readw(MCF_IPSBAR + 0x100082);
writew(par | 0xa0, MCF_IPSBAR + 0x100082);
@ -207,21 +174,6 @@ static void __init m527x_fec_init(void)
/***************************************************************************/
void mcf_disableall(void)
{
*((volatile unsigned long *) (MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRH)) = 0xffffffff;
*((volatile unsigned long *) (MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRL)) = 0xffffffff;
}
/***************************************************************************/
void mcf_autovector(unsigned int vec)
{
/* Everything is auto-vectored on the 5272 */
}
/***************************************************************************/
static void m527x_cpu_reset(void)
{
local_irq_disable();
@ -232,7 +184,6 @@ static void m527x_cpu_reset(void)
void __init config_BSP(char *commandp, int size)
{
mcf_disableall();
mach_reset = m527x_cpu_reset;
m527x_uarts_init();
m527x_fec_init();