forked from luck/tmp_suning_uos_patched
avr32: at32ap700x: Specify DMA Flow Controller, Src and Dst msize
Now that the dw_dmac DMA driver supports configurable Flow Controller, source and destination burst or msize, we need to specify which ones to use. Msize or burst size was previously hardcoded to 1, Flow controller was DMA for both M2P & P2M transfers. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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@ -2050,6 +2050,9 @@ at32_add_device_ac97c(unsigned int id, struct ac97c_platform_data *data,
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rx_dws->cfg_lo &= ~(DWC_CFGL_HS_DST_POL | DWC_CFGL_HS_SRC_POL);
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rx_dws->src_master = 0;
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rx_dws->dst_master = 1;
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rx_dws->src_msize = DW_DMA_MSIZE_1;
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rx_dws->dst_msize = DW_DMA_MSIZE_1;
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rx_dws->fc = DW_DMA_FC_D_P2M;
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}
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/* Check if DMA slave interface for playback should be configured. */
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@ -2060,6 +2063,9 @@ at32_add_device_ac97c(unsigned int id, struct ac97c_platform_data *data,
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tx_dws->cfg_lo &= ~(DWC_CFGL_HS_DST_POL | DWC_CFGL_HS_SRC_POL);
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rx_dws->src_master = 0;
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rx_dws->dst_master = 1;
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tx_dws->src_msize = DW_DMA_MSIZE_1;
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tx_dws->dst_msize = DW_DMA_MSIZE_1;
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tx_dws->fc = DW_DMA_FC_D_M2P;
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}
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if (platform_device_add_data(pdev, data,
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@ -2134,6 +2140,9 @@ at32_add_device_abdac(unsigned int id, struct atmel_abdac_pdata *data)
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dws->cfg_lo &= ~(DWC_CFGL_HS_DST_POL | DWC_CFGL_HS_SRC_POL);
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dws->src_master = 0;
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dws->dst_master = 1;
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dws->src_msize = DW_DMA_MSIZE_1;
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dws->dst_msize = DW_DMA_MSIZE_1;
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dws->fc = DW_DMA_FC_D_M2P;
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if (platform_device_add_data(pdev, data,
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sizeof(struct atmel_abdac_pdata)))
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