forked from luck/tmp_suning_uos_patched
coresight: tmc-etb/etf: Prepare to handle errors enabling
Prepare to handle errors in enabling the hardware and report it back to the core driver. Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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1c7995e11c
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1d364034aa
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@ -15,7 +15,7 @@
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static int tmc_set_etf_buffer(struct coresight_device *csdev,
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struct perf_output_handle *handle);
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static void tmc_etb_enable_hw(struct tmc_drvdata *drvdata)
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static void __tmc_etb_enable_hw(struct tmc_drvdata *drvdata)
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{
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CS_UNLOCK(drvdata->base);
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@ -34,6 +34,12 @@ static void tmc_etb_enable_hw(struct tmc_drvdata *drvdata)
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CS_LOCK(drvdata->base);
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}
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static int tmc_etb_enable_hw(struct tmc_drvdata *drvdata)
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{
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__tmc_etb_enable_hw(drvdata);
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return 0;
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}
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static void tmc_etb_dump_hw(struct tmc_drvdata *drvdata)
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{
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char *bufp;
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@ -73,7 +79,7 @@ static void tmc_etb_disable_hw(struct tmc_drvdata *drvdata)
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CS_LOCK(drvdata->base);
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}
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static void tmc_etf_enable_hw(struct tmc_drvdata *drvdata)
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static void __tmc_etf_enable_hw(struct tmc_drvdata *drvdata)
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{
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CS_UNLOCK(drvdata->base);
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@ -89,6 +95,12 @@ static void tmc_etf_enable_hw(struct tmc_drvdata *drvdata)
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CS_LOCK(drvdata->base);
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}
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static int tmc_etf_enable_hw(struct tmc_drvdata *drvdata)
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{
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__tmc_etf_enable_hw(drvdata);
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return 0;
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}
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static void tmc_etf_disable_hw(struct tmc_drvdata *drvdata)
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{
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CS_UNLOCK(drvdata->base);
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@ -171,8 +183,12 @@ static int tmc_enable_etf_sink_sysfs(struct coresight_device *csdev)
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drvdata->buf = buf;
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}
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drvdata->mode = CS_MODE_SYSFS;
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tmc_etb_enable_hw(drvdata);
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ret = tmc_etb_enable_hw(drvdata);
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if (!ret)
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drvdata->mode = CS_MODE_SYSFS;
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else
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/* Free up the buffer if we failed to enable */
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used = false;
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out:
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spin_unlock_irqrestore(&drvdata->spinlock, flags);
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@ -191,27 +207,25 @@ static int tmc_enable_etf_sink_perf(struct coresight_device *csdev, void *data)
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struct perf_output_handle *handle = data;
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spin_lock_irqsave(&drvdata->spinlock, flags);
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if (drvdata->reading) {
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do {
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ret = -EINVAL;
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goto out;
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}
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if (drvdata->reading)
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break;
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/*
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* In Perf mode there can be only one writer per sink. There
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* is also no need to continue if the ETB/ETF is already
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* operated from sysFS.
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*/
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if (drvdata->mode != CS_MODE_DISABLED)
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break;
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/*
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* In Perf mode there can be only one writer per sink. There
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* is also no need to continue if the ETB/ETR is already operated
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* from sysFS.
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*/
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if (drvdata->mode != CS_MODE_DISABLED) {
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ret = -EINVAL;
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goto out;
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}
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ret = tmc_set_etf_buffer(csdev, handle);
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if (!ret) {
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drvdata->mode = CS_MODE_PERF;
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tmc_etb_enable_hw(drvdata);
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}
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out:
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ret = tmc_set_etf_buffer(csdev, handle);
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if (ret)
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break;
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ret = tmc_etb_enable_hw(drvdata);
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if (!ret)
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drvdata->mode = CS_MODE_PERF;
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} while (0);
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spin_unlock_irqrestore(&drvdata->spinlock, flags);
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return ret;
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@ -268,6 +282,7 @@ static void tmc_disable_etf_sink(struct coresight_device *csdev)
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static int tmc_enable_etf_link(struct coresight_device *csdev,
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int inport, int outport)
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{
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int ret;
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unsigned long flags;
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struct tmc_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
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@ -277,12 +292,14 @@ static int tmc_enable_etf_link(struct coresight_device *csdev,
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return -EBUSY;
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}
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tmc_etf_enable_hw(drvdata);
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drvdata->mode = CS_MODE_SYSFS;
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ret = tmc_etf_enable_hw(drvdata);
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if (!ret)
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drvdata->mode = CS_MODE_SYSFS;
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spin_unlock_irqrestore(&drvdata->spinlock, flags);
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dev_dbg(drvdata->dev, "TMC-ETF enabled\n");
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return 0;
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if (!ret)
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dev_dbg(drvdata->dev, "TMC-ETF enabled\n");
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return ret;
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}
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static void tmc_disable_etf_link(struct coresight_device *csdev,
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@ -576,7 +593,7 @@ int tmc_read_unprepare_etb(struct tmc_drvdata *drvdata)
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* can't be NULL.
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*/
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memset(drvdata->buf, 0, drvdata->size);
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tmc_etb_enable_hw(drvdata);
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__tmc_etb_enable_hw(drvdata);
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} else {
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/*
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* The ETB/ETF is not tracing and the buffer was just read.
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