forked from luck/tmp_suning_uos_patched
RISC-V: Typo fixes in image header and documentation.
There are some typos in boot image header and riscv boot documentation. Fix the typos. Signed-off-by: Atish Patra <atish.patra@wdc.com> Reviewed-by: Palmer Dabbelt <palmerdabbelt@google.com> Link: https://lore.kernel.org/r/20191009010637.9955-1-atish.patra@wdc.com Signed-off-by: Jonathan Corbet <corbet@lwn.net>
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@ -22,7 +22,7 @@ The following 64-byte header is present in decompressed Linux kernel image::
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u64 res2 = 0; /* Reserved */
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u64 magic = 0x5643534952; /* Magic number, little endian, "RISCV" */
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u32 magic2 = 0x05435352; /* Magic number 2, little endian, "RSC\x05" */
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u32 res4; /* Reserved for PE COFF offset */
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u32 res3; /* Reserved for PE COFF offset */
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This header format is compliant with PE/COFF header and largely inspired from
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ARM64 header. Thus, both ARM64 & RISC-V header can be combined into one common
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@ -34,7 +34,7 @@ Notes
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- This header can also be reused to support EFI stub for RISC-V in future. EFI
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specification needs PE/COFF image header in the beginning of the kernel image
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in order to load it as an EFI application. In order to support EFI stub,
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code0 should be replaced with "MZ" magic string and res5(at offset 0x3c) should
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code0 should be replaced with "MZ" magic string and res3(at offset 0x3c) should
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point to the rest of the PE/COFF header.
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- version field indicate header version number
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@ -42,7 +42,7 @@
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* @res2: reserved
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* @magic: Magic number (RISC-V specific; deprecated)
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* @magic2: Magic number 2 (to match the ARM64 'magic' field pos)
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* @res4: reserved (will be used for PE COFF offset)
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* @res3: reserved (will be used for PE COFF offset)
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*
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* The intention is for this header format to be shared between multiple
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* architectures to avoid a proliferation of image header formats.
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@ -59,7 +59,7 @@ struct riscv_image_header {
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u64 res2;
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u64 magic;
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u32 magic2;
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u32 res4;
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u32 res3;
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};
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#endif /* __ASSEMBLY__ */
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#endif /* _ASM_RISCV_IMAGE_H */
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