forked from luck/tmp_suning_uos_patched
dma-pool: scale the default DMA coherent pool size with memory capacity
When AMD memory encryption is enabled, some devices may use more than 256KB/sec from the atomic pools. It would be more appropriate to scale the default size based on memory capacity unless the coherent_pool option is used on the kernel command line. This provides a slight optimization on initial expansion and is deemed appropriate due to the increased reliance on the atomic pools. Note that the default size of 128KB per pool will normally be larger than the single coherent pool implementation since there are now up to three coherent pools (DMA, DMA32, and kernel). Note that even prior to this patch, coherent_pool= for sizes larger than 1 << (PAGE_SHIFT + MAX_ORDER-1) can fail. With new dynamic expansion support, this would be trivially extensible to allow even larger initial sizes. Signed-off-by: David Rientjes <rientjes@google.com> Signed-off-by: Christoph Hellwig <hch@lst.de>
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@ -20,8 +20,8 @@ static unsigned long pool_size_dma32;
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static struct gen_pool *atomic_pool_kernel __ro_after_init;
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static unsigned long pool_size_kernel;
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#define DEFAULT_DMA_COHERENT_POOL_SIZE SZ_256K
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static size_t atomic_pool_size = DEFAULT_DMA_COHERENT_POOL_SIZE;
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/* Size can be defined by the coherent_pool command line */
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static size_t atomic_pool_size;
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/* Dynamic background expansion when the atomic pool is near capacity */
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static struct work_struct atomic_pool_work;
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@ -170,6 +170,16 @@ static int __init dma_atomic_pool_init(void)
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{
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int ret = 0;
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/*
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* If coherent_pool was not used on the command line, default the pool
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* sizes to 128KB per 1GB of memory, min 128KB, max MAX_ORDER-1.
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*/
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if (!atomic_pool_size) {
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atomic_pool_size = max(totalram_pages() >> PAGE_SHIFT, 1UL) *
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SZ_128K;
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atomic_pool_size = min_t(size_t, atomic_pool_size,
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1 << (PAGE_SHIFT + MAX_ORDER-1));
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}
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INIT_WORK(&atomic_pool_work, atomic_pool_work_fn);
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atomic_pool_kernel = __dma_atomic_pool_init(atomic_pool_size,
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