forked from luck/tmp_suning_uos_patched
ARM: tegra: Rename some of the newly exposed PM functions
Rename some of the recently exposed PM functions, prefixing them with "tegra_pm_" in order to make the naming of the PM functions consistent. Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com> Tested-by: Peter Geis <pgwipeout@gmail.com> Tested-by: Jasper Korten <jja2000@gmail.com> Tested-by: David Heidelberg <david@ixit.cz> Tested-by: Nicolas Chauvet <kwizart@gmail.com> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
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@ -35,17 +35,17 @@ static int tegra114_idle_power_down(struct cpuidle_device *dev,
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{
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{
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local_fiq_disable();
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local_fiq_disable();
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tegra_set_cpu_in_lp2();
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tegra_pm_set_cpu_in_lp2();
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cpu_pm_enter();
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cpu_pm_enter();
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call_firmware_op(prepare_idle, TF_PM_MODE_LP2_NOFLUSH_L2);
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call_firmware_op(prepare_idle, TF_PM_MODE_LP2_NOFLUSH_L2);
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/* Do suspend by ourselves if the firmware does not implement it */
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/* Do suspend by ourselves if the firmware does not implement it */
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if (call_firmware_op(do_idle, 0) == -ENOSYS)
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if (call_firmware_op(do_idle, 0) == -ENOSYS)
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cpu_suspend(0, tegra30_sleep_cpu_secondary_finish);
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cpu_suspend(0, tegra30_pm_secondary_cpu_suspend);
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cpu_pm_exit();
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cpu_pm_exit();
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tegra_clear_cpu_in_lp2();
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tegra_pm_clear_cpu_in_lp2();
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local_fiq_enable();
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local_fiq_enable();
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@ -91,7 +91,7 @@ static bool tegra20_cpu_cluster_power_down(struct cpuidle_device *dev,
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while (!tegra_cpu_rail_off_ready())
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while (!tegra_cpu_rail_off_ready())
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cpu_relax();
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cpu_relax();
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ret = !tegra_idle_lp2_last();
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ret = !tegra_pm_enter_lp2();
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if (cpu_online(1))
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if (cpu_online(1))
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tegra20_wake_cpu1_from_reset();
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tegra20_wake_cpu1_from_reset();
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@ -136,7 +136,7 @@ static int tegra20_idle_lp2_coupled(struct cpuidle_device *dev,
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local_fiq_disable();
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local_fiq_disable();
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tegra_set_cpu_in_lp2();
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tegra_pm_set_cpu_in_lp2();
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cpu_pm_enter();
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cpu_pm_enter();
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if (dev->cpu == 0)
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if (dev->cpu == 0)
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@ -145,7 +145,7 @@ static int tegra20_idle_lp2_coupled(struct cpuidle_device *dev,
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entered_lp2 = tegra20_idle_enter_lp2_cpu_1(dev, drv, index);
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entered_lp2 = tegra20_idle_enter_lp2_cpu_1(dev, drv, index);
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cpu_pm_exit();
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cpu_pm_exit();
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tegra_clear_cpu_in_lp2();
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tegra_pm_clear_cpu_in_lp2();
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local_fiq_enable();
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local_fiq_enable();
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@ -69,7 +69,7 @@ static bool tegra30_cpu_cluster_power_down(struct cpuidle_device *dev,
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return false;
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return false;
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}
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}
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return !tegra_idle_lp2_last();
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return !tegra_pm_enter_lp2();
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}
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}
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#ifdef CONFIG_SMP
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#ifdef CONFIG_SMP
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@ -79,7 +79,7 @@ static bool tegra30_cpu_core_power_down(struct cpuidle_device *dev,
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{
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{
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smp_wmb();
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smp_wmb();
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cpu_suspend(0, tegra30_sleep_cpu_secondary_finish);
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cpu_suspend(0, tegra30_pm_secondary_cpu_suspend);
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return true;
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return true;
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}
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}
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@ -100,7 +100,7 @@ static int tegra30_idle_lp2(struct cpuidle_device *dev,
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local_fiq_disable();
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local_fiq_disable();
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tegra_set_cpu_in_lp2();
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tegra_pm_set_cpu_in_lp2();
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cpu_pm_enter();
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cpu_pm_enter();
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if (dev->cpu == 0)
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if (dev->cpu == 0)
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@ -109,7 +109,7 @@ static int tegra30_idle_lp2(struct cpuidle_device *dev,
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entered_lp2 = tegra30_cpu_core_power_down(dev, drv, index);
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entered_lp2 = tegra30_cpu_core_power_down(dev, drv, index);
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cpu_pm_exit();
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cpu_pm_exit();
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tegra_clear_cpu_in_lp2();
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tegra_pm_clear_cpu_in_lp2();
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local_fiq_enable();
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local_fiq_enable();
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@ -110,7 +110,7 @@ static void suspend_cpu_complex(void)
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flowctrl_cpu_suspend_enter(cpu);
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flowctrl_cpu_suspend_enter(cpu);
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}
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}
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void tegra_clear_cpu_in_lp2(void)
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void tegra_pm_clear_cpu_in_lp2(void)
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{
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{
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int phy_cpu_id = cpu_logical_map(smp_processor_id());
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int phy_cpu_id = cpu_logical_map(smp_processor_id());
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u32 *cpu_in_lp2 = tegra_cpu_lp2_mask;
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u32 *cpu_in_lp2 = tegra_cpu_lp2_mask;
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@ -123,7 +123,7 @@ void tegra_clear_cpu_in_lp2(void)
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spin_unlock(&tegra_lp2_lock);
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spin_unlock(&tegra_lp2_lock);
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}
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}
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void tegra_set_cpu_in_lp2(void)
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void tegra_pm_set_cpu_in_lp2(void)
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{
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{
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int phy_cpu_id = cpu_logical_map(smp_processor_id());
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int phy_cpu_id = cpu_logical_map(smp_processor_id());
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u32 *cpu_in_lp2 = tegra_cpu_lp2_mask;
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u32 *cpu_in_lp2 = tegra_cpu_lp2_mask;
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@ -189,7 +189,7 @@ static void tegra_pm_set(enum tegra_suspend_mode mode)
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tegra_pmc_enter_suspend_mode(mode);
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tegra_pmc_enter_suspend_mode(mode);
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}
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}
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int tegra_idle_lp2_last(void)
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int tegra_pm_enter_lp2(void)
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{
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{
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int err;
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int err;
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@ -356,7 +356,7 @@ static int tegra_suspend_enter(suspend_state_t state)
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tegra_suspend_enter_lp1();
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tegra_suspend_enter_lp1();
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break;
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break;
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case TEGRA_SUSPEND_LP2:
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case TEGRA_SUSPEND_LP2:
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tegra_set_cpu_in_lp2();
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tegra_pm_set_cpu_in_lp2();
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break;
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break;
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default:
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default:
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break;
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break;
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@ -377,7 +377,7 @@ static int tegra_suspend_enter(suspend_state_t state)
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tegra_suspend_exit_lp1();
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tegra_suspend_exit_lp1();
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break;
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break;
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case TEGRA_SUSPEND_LP2:
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case TEGRA_SUSPEND_LP2:
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tegra_clear_cpu_in_lp2();
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tegra_pm_clear_cpu_in_lp2();
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break;
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break;
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default:
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default:
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break;
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break;
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@ -265,11 +265,11 @@ ENTRY(tegra30_sleep_core_finish)
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ENDPROC(tegra30_sleep_core_finish)
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ENDPROC(tegra30_sleep_core_finish)
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/*
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/*
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* tegra30_sleep_cpu_secondary_finish(unsigned long v2p)
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* tegra30_pm_secondary_cpu_suspend(unsigned long unused_arg)
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*
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*
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* Enters LP2 on secondary CPU by exiting coherency and powergating the CPU.
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* Enters LP2 on secondary CPU by exiting coherency and powergating the CPU.
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*/
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*/
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ENTRY(tegra30_sleep_cpu_secondary_finish)
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ENTRY(tegra30_pm_secondary_cpu_suspend)
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mov r7, lr
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mov r7, lr
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/* Flush and disable the L1 data cache */
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/* Flush and disable the L1 data cache */
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@ -281,7 +281,7 @@ ENTRY(tegra30_sleep_cpu_secondary_finish)
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bl tegra30_cpu_shutdown
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bl tegra30_cpu_shutdown
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mov r0, #1 @ never return here
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mov r0, #1 @ never return here
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ret r7
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ret r7
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ENDPROC(tegra30_sleep_cpu_secondary_finish)
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ENDPROC(tegra30_pm_secondary_cpu_suspend)
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/*
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/*
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* tegra30_tear_down_cpu
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* tegra30_tear_down_cpu
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@ -23,10 +23,10 @@ tegra_pm_validate_suspend_mode(enum tegra_suspend_mode mode);
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/* low-level resume entry point */
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/* low-level resume entry point */
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void tegra_resume(void);
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void tegra_resume(void);
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int tegra30_sleep_cpu_secondary_finish(unsigned long arg);
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int tegra30_pm_secondary_cpu_suspend(unsigned long arg);
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void tegra_clear_cpu_in_lp2(void);
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void tegra_pm_clear_cpu_in_lp2(void);
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void tegra_set_cpu_in_lp2(void);
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void tegra_pm_set_cpu_in_lp2(void);
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int tegra_idle_lp2_last(void);
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int tegra_pm_enter_lp2(void);
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int tegra_pm_park_secondary_cpu(unsigned long cpu);
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int tegra_pm_park_secondary_cpu(unsigned long cpu);
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#else
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#else
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static inline enum tegra_suspend_mode
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static inline enum tegra_suspend_mode
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@ -39,20 +39,20 @@ static inline void tegra_resume(void)
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{
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{
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}
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}
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static inline int tegra30_sleep_cpu_secondary_finish(unsigned long arg)
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static inline int tegra30_pm_secondary_cpu_suspend(unsigned long arg)
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{
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{
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return -ENOTSUPP;
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return -ENOTSUPP;
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}
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}
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static inline void tegra_clear_cpu_in_lp2(void)
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static inline void tegra_pm_clear_cpu_in_lp2(void)
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{
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{
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}
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}
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static inline void tegra_set_cpu_in_lp2(void)
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static inline void tegra_pm_set_cpu_in_lp2(void)
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{
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{
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}
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}
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static inline int tegra_idle_lp2_last(void)
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static inline int tegra_pm_enter_lp2(void)
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{
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{
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return -ENOTSUPP;
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return -ENOTSUPP;
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}
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}
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