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ARM: tegra: Rename some of the newly exposed PM functions

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Rename some of the recently exposed PM functions, prefixing them with
"tegra_pm_" in order to make the naming of the PM functions consistent.

Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Tested-by: Peter Geis <pgwipeout@gmail.com>
Tested-by: Jasper Korten <jja2000@gmail.com>
Tested-by: David Heidelberg <david@ixit.cz>
Tested-by: Nicolas Chauvet <kwizart@gmail.com>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
This commit is contained in:
Dmitry Osipenko 2020-02-25 01:40:47 +03:00 committed by Thierry Reding
parent 7741868f38
commit 1f3e18ec95
6 changed files with 26 additions and 26 deletions
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6
arch/arm/mach-tegra/cpuidle-tegra114.c
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@ -35,17 +35,17 @@ static int tegra114_idle_power_down(struct cpuidle_device *dev,
{
local_fiq_disable();
tegra_set_cpu_in_lp2();
tegra_pm_set_cpu_in_lp2();
cpu_pm_enter();
call_firmware_op(prepare_idle, TF_PM_MODE_LP2_NOFLUSH_L2);
/* Do suspend by ourselves if the firmware does not implement it */
if (call_firmware_op(do_idle, 0) == -ENOSYS)
cpu_suspend(0, tegra30_sleep_cpu_secondary_finish);
cpu_suspend(0, tegra30_pm_secondary_cpu_suspend);
cpu_pm_exit();
tegra_clear_cpu_in_lp2();
tegra_pm_clear_cpu_in_lp2();
local_fiq_enable();

6
arch/arm/mach-tegra/cpuidle-tegra20.c
View File

@ -91,7 +91,7 @@ static bool tegra20_cpu_cluster_power_down(struct cpuidle_device *dev,
while (!tegra_cpu_rail_off_ready())
cpu_relax();
ret = !tegra_idle_lp2_last();
ret = !tegra_pm_enter_lp2();
if (cpu_online(1))
tegra20_wake_cpu1_from_reset();
@ -136,7 +136,7 @@ static int tegra20_idle_lp2_coupled(struct cpuidle_device *dev,
local_fiq_disable();
tegra_set_cpu_in_lp2();
tegra_pm_set_cpu_in_lp2();
cpu_pm_enter();
if (dev->cpu == 0)
@ -145,7 +145,7 @@ static int tegra20_idle_lp2_coupled(struct cpuidle_device *dev,
entered_lp2 = tegra20_idle_enter_lp2_cpu_1(dev, drv, index);
cpu_pm_exit();
tegra_clear_cpu_in_lp2();
tegra_pm_clear_cpu_in_lp2();
local_fiq_enable();

8
arch/arm/mach-tegra/cpuidle-tegra30.c
View File

@ -69,7 +69,7 @@ static bool tegra30_cpu_cluster_power_down(struct cpuidle_device *dev,
return false;
}
return !tegra_idle_lp2_last();
return !tegra_pm_enter_lp2();
}
#ifdef CONFIG_SMP
@ -79,7 +79,7 @@ static bool tegra30_cpu_core_power_down(struct cpuidle_device *dev,
{
smp_wmb();
cpu_suspend(0, tegra30_sleep_cpu_secondary_finish);
cpu_suspend(0, tegra30_pm_secondary_cpu_suspend);
return true;
}
@ -100,7 +100,7 @@ static int tegra30_idle_lp2(struct cpuidle_device *dev,
local_fiq_disable();
tegra_set_cpu_in_lp2();
tegra_pm_set_cpu_in_lp2();
cpu_pm_enter();
if (dev->cpu == 0)
@ -109,7 +109,7 @@ static int tegra30_idle_lp2(struct cpuidle_device *dev,
entered_lp2 = tegra30_cpu_core_power_down(dev, drv, index);
cpu_pm_exit();
tegra_clear_cpu_in_lp2();
tegra_pm_clear_cpu_in_lp2();
local_fiq_enable();

10
arch/arm/mach-tegra/pm.c
View File

@ -110,7 +110,7 @@ static void suspend_cpu_complex(void)
flowctrl_cpu_suspend_enter(cpu);
}
void tegra_clear_cpu_in_lp2(void)
void tegra_pm_clear_cpu_in_lp2(void)
{
int phy_cpu_id = cpu_logical_map(smp_processor_id());
u32 *cpu_in_lp2 = tegra_cpu_lp2_mask;
@ -123,7 +123,7 @@ void tegra_clear_cpu_in_lp2(void)
spin_unlock(&tegra_lp2_lock);
}
void tegra_set_cpu_in_lp2(void)
void tegra_pm_set_cpu_in_lp2(void)
{
int phy_cpu_id = cpu_logical_map(smp_processor_id());
u32 *cpu_in_lp2 = tegra_cpu_lp2_mask;
@ -189,7 +189,7 @@ static void tegra_pm_set(enum tegra_suspend_mode mode)
tegra_pmc_enter_suspend_mode(mode);
}
int tegra_idle_lp2_last(void)
int tegra_pm_enter_lp2(void)
{
int err;
@ -356,7 +356,7 @@ static int tegra_suspend_enter(suspend_state_t state)
tegra_suspend_enter_lp1();
break;
case TEGRA_SUSPEND_LP2:
tegra_set_cpu_in_lp2();
tegra_pm_set_cpu_in_lp2();
break;
default:
break;
@ -377,7 +377,7 @@ static int tegra_suspend_enter(suspend_state_t state)
tegra_suspend_exit_lp1();
break;
case TEGRA_SUSPEND_LP2:
tegra_clear_cpu_in_lp2();
tegra_pm_clear_cpu_in_lp2();
break;
default:
break;

6
arch/arm/mach-tegra/sleep-tegra30.S
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@ -265,11 +265,11 @@ ENTRY(tegra30_sleep_core_finish)
ENDPROC(tegra30_sleep_core_finish)
/*
* tegra30_sleep_cpu_secondary_finish(unsigned long v2p)
* tegra30_pm_secondary_cpu_suspend(unsigned long unused_arg)
*
* Enters LP2 on secondary CPU by exiting coherency and powergating the CPU.
*/
ENTRY(tegra30_sleep_cpu_secondary_finish)
ENTRY(tegra30_pm_secondary_cpu_suspend)
mov r7, lr
/* Flush and disable the L1 data cache */
@ -281,7 +281,7 @@ ENTRY(tegra30_sleep_cpu_secondary_finish)
bl tegra30_cpu_shutdown
mov r0, #1 @ never return here
ret r7
ENDPROC(tegra30_sleep_cpu_secondary_finish)
ENDPROC(tegra30_pm_secondary_cpu_suspend)
/*
* tegra30_tear_down_cpu

16
include/soc/tegra/pm.h
View File

@ -23,10 +23,10 @@ tegra_pm_validate_suspend_mode(enum tegra_suspend_mode mode);
/* low-level resume entry point */
void tegra_resume(void);
int tegra30_sleep_cpu_secondary_finish(unsigned long arg);
void tegra_clear_cpu_in_lp2(void);
void tegra_set_cpu_in_lp2(void);
int tegra_idle_lp2_last(void);
int tegra30_pm_secondary_cpu_suspend(unsigned long arg);
void tegra_pm_clear_cpu_in_lp2(void);
void tegra_pm_set_cpu_in_lp2(void);
int tegra_pm_enter_lp2(void);
int tegra_pm_park_secondary_cpu(unsigned long cpu);
#else
static inline enum tegra_suspend_mode
@ -39,20 +39,20 @@ static inline void tegra_resume(void)
{
}
static inline int tegra30_sleep_cpu_secondary_finish(unsigned long arg)
static inline int tegra30_pm_secondary_cpu_suspend(unsigned long arg)
{
return -ENOTSUPP;
}
static inline void tegra_clear_cpu_in_lp2(void)
static inline void tegra_pm_clear_cpu_in_lp2(void)
{
}
static inline void tegra_set_cpu_in_lp2(void)
static inline void tegra_pm_set_cpu_in_lp2(void)
{
}
static inline int tegra_idle_lp2_last(void)
static inline int tegra_pm_enter_lp2(void)
{
return -ENOTSUPP;
}