forked from luck/tmp_suning_uos_patched
microblaze: Fix pte_update function
Do not disable irq in asm but use irq macros. Systems with MSR=0 couldn't use pte_update function because msrclr was hardcoded. Signed-off-by: Michal Simek <monstr@monstr.eu>
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1649700408
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@ -411,20 +411,19 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
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static inline unsigned long pte_update(pte_t *p, unsigned long clr,
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unsigned long set)
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{
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unsigned long old, tmp, msr;
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unsigned long flags, old, tmp;
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__asm__ __volatile__("\
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msrclr %2, 0x2\n\
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nop\n\
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lw %0, %4, r0\n\
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andn %1, %0, %5\n\
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or %1, %1, %6\n\
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sw %1, %4, r0\n\
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mts rmsr, %2\n\
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nop"
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: "=&r" (old), "=&r" (tmp), "=&r" (msr), "=m" (*p)
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: "r" ((unsigned long)(p + 1) - 4), "r" (clr), "r" (set), "m" (*p)
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: "cc");
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raw_local_irq_save(flags);
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__asm__ __volatile__( "lw %0, %2, r0 \n"
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"andn %1, %0, %3 \n"
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"or %1, %1, %4 \n"
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"sw %1, %2, r0 \n"
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: "=&r" (old), "=&r" (tmp)
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: "r" ((unsigned long)(p + 1) - 4), "r" (clr), "r" (set)
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: "cc");
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raw_local_irq_restore(flags);
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return old;
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}
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