forked from luck/tmp_suning_uos_patched
drivers/net/*/: Use static const
Using static const generally increases object text and decreases data size. It also generally decreases overall object size. Signed-off-by: Joe Perches <joe@perches.com>
This commit is contained in:
Joe Perches
parent
75a84eb5d1
commit
215faf9c5f
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@ -549,7 +549,9 @@ be_test_ddr_dma(struct be_adapter *adapter)
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{
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int ret, i;
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struct be_dma_mem ddrdma_cmd;
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u64 pattern[2] = {0x5a5a5a5a5a5a5a5aULL, 0xa5a5a5a5a5a5a5a5ULL};
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static const u64 pattern[2] = {
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0x5a5a5a5a5a5a5a5aULL, 0xa5a5a5a5a5a5a5a5ULL
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};
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ddrdma_cmd.size = sizeof(struct be_cmd_req_ddrdma_test);
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ddrdma_cmd.va = pci_alloc_consistent(adapter->pdev, ddrdma_cmd.size,
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@ -2398,10 +2398,10 @@ static int be_flash_data(struct be_adapter *adapter,
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int num_bytes;
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const u8 *p = fw->data;
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struct be_cmd_write_flashrom *req = flash_cmd->va;
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struct flash_comp *pflashcomp;
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const struct flash_comp *pflashcomp;
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int num_comp;
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struct flash_comp gen3_flash_types[9] = {
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static const struct flash_comp gen3_flash_types[9] = {
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{ FLASH_iSCSI_PRIMARY_IMAGE_START_g3, IMG_TYPE_ISCSI_ACTIVE,
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FLASH_IMAGE_MAX_SIZE_g3},
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{ FLASH_REDBOOT_START_g3, IMG_TYPE_REDBOOT,
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@ -2421,7 +2421,7 @@ static int be_flash_data(struct be_adapter *adapter,
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{ FLASH_NCSI_START_g3, IMG_TYPE_NCSI_FW,
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FLASH_NCSI_IMAGE_MAX_SIZE_g3}
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};
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struct flash_comp gen2_flash_types[8] = {
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static const struct flash_comp gen2_flash_types[8] = {
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{ FLASH_iSCSI_PRIMARY_IMAGE_START_g2, IMG_TYPE_ISCSI_ACTIVE,
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FLASH_IMAGE_MAX_SIZE_g2},
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{ FLASH_REDBOOT_START_g2, IMG_TYPE_REDBOOT,
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@ -2443,11 +2443,11 @@ static int be_flash_data(struct be_adapter *adapter,
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if (adapter->generation == BE_GEN3) {
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pflashcomp = gen3_flash_types;
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filehdr_size = sizeof(struct flash_file_hdr_g3);
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num_comp = 9;
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num_comp = ARRAY_SIZE(gen3_flash_types);
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} else {
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pflashcomp = gen2_flash_types;
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filehdr_size = sizeof(struct flash_file_hdr_g2);
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num_comp = 8;
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num_comp = ARRAY_SIZE(gen2_flash_types);
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}
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for (i = 0; i < num_comp; i++) {
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if ((pflashcomp[i].optype == IMG_TYPE_NCSI_FW) &&
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@ -6208,7 +6208,7 @@ static int bnx2x_func_stop(struct bnx2x *bp)
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* @param cam_offset offset in a CAM to use
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* @param is_bcast is the set MAC a broadcast address (for E1 only)
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*/
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static void bnx2x_set_mac_addr_gen(struct bnx2x *bp, int set, u8 *mac,
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static void bnx2x_set_mac_addr_gen(struct bnx2x *bp, int set, const u8 *mac,
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u32 cl_bit_vec, u8 cam_offset,
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u8 is_bcast)
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{
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@ -6400,7 +6400,9 @@ void bnx2x_set_eth_mac(struct bnx2x *bp, int set)
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if (CHIP_IS_E1(bp)) {
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/* broadcast MAC */
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u8 bcast[ETH_ALEN] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff };
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static const u8 bcast[ETH_ALEN] = {
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff
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};
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bnx2x_set_mac_addr_gen(bp, set, bcast, 0, cam_offset + 1, 1);
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}
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}
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@ -383,7 +383,7 @@ static void plx_pci_reset_marathon(struct pci_dev *pdev)
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{
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void __iomem *reset_addr;
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int i;
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int reset_bar[2] = {3, 5};
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static const int reset_bar[2] = {3, 5};
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plx_pci_reset_common(pdev);
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@ -273,6 +273,10 @@ struct sge {
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struct cmdQ cmdQ[SGE_CMDQ_N] ____cacheline_aligned_in_smp;
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};
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static const u8 ch_mac_addr[ETH_ALEN] = {
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0x0, 0x7, 0x43, 0x0, 0x0, 0x0
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};
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/*
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* stop tasklet and free all pending skb's
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*/
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@ -2012,10 +2016,6 @@ static void espibug_workaround_t204(unsigned long data)
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continue;
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if (!skb->cb[0]) {
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u8 ch_mac_addr[ETH_ALEN] = {
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0x0, 0x7, 0x43, 0x0, 0x0, 0x0
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};
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skb_copy_to_linear_data_offset(skb,
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sizeof(struct cpl_tx_pkt),
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ch_mac_addr,
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@ -2048,8 +2048,6 @@ static void espibug_workaround(unsigned long data)
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if ((seop & 0xfff0fff) == 0xfff && skb) {
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if (!skb->cb[0]) {
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u8 ch_mac_addr[ETH_ALEN] =
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{0x0, 0x7, 0x43, 0x0, 0x0, 0x0};
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skb_copy_to_linear_data_offset(skb,
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sizeof(struct cpl_tx_pkt),
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ch_mac_addr,
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@ -292,7 +292,7 @@ static int ael2xxx_get_module_type(struct cphy *phy, int delay_ms)
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*/
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static int ael2005_setup_sr_edc(struct cphy *phy)
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{
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static struct reg_val regs[] = {
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static const struct reg_val regs[] = {
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{ MDIO_MMD_PMAPMD, 0xc003, 0xffff, 0x181 },
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{ MDIO_MMD_PMAPMD, 0xc010, 0xffff, 0x448a },
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{ MDIO_MMD_PMAPMD, 0xc04a, 0xffff, 0x5200 },
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@ -324,11 +324,11 @@ static int ael2005_setup_sr_edc(struct cphy *phy)
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static int ael2005_setup_twinax_edc(struct cphy *phy, int modtype)
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{
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static struct reg_val regs[] = {
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static const struct reg_val regs[] = {
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{ MDIO_MMD_PMAPMD, 0xc04a, 0xffff, 0x5a00 },
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{ 0, 0, 0, 0 }
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};
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static struct reg_val preemphasis[] = {
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static const struct reg_val preemphasis[] = {
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{ MDIO_MMD_PMAPMD, 0xc014, 0xffff, 0xfe16 },
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{ MDIO_MMD_PMAPMD, 0xc015, 0xffff, 0xa000 },
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{ 0, 0, 0, 0 }
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@ -393,7 +393,7 @@ static int ael2005_intr_clear(struct cphy *phy)
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static int ael2005_reset(struct cphy *phy, int wait)
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{
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static struct reg_val regs0[] = {
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static const struct reg_val regs0[] = {
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{ MDIO_MMD_PMAPMD, 0xc001, 0, 1 << 5 },
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{ MDIO_MMD_PMAPMD, 0xc017, 0, 1 << 5 },
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{ MDIO_MMD_PMAPMD, 0xc013, 0xffff, 0xf341 },
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@ -403,7 +403,7 @@ static int ael2005_reset(struct cphy *phy, int wait)
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{ MDIO_MMD_PMAPMD, 0xc210, 0xffff, 0 },
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{ 0, 0, 0, 0 }
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};
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static struct reg_val regs1[] = {
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static const struct reg_val regs1[] = {
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{ MDIO_MMD_PMAPMD, 0xca00, 0xffff, 0x0080 },
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{ MDIO_MMD_PMAPMD, 0xca12, 0xffff, 0 },
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{ 0, 0, 0, 0 }
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@ -522,7 +522,7 @@ int t3_ael2005_phy_prep(struct cphy *phy, struct adapter *adapter,
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*/
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static int ael2020_setup_sr_edc(struct cphy *phy)
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{
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static struct reg_val regs[] = {
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static const struct reg_val regs[] = {
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/* set CDR offset to 10 */
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{ MDIO_MMD_PMAPMD, 0xcc01, 0xffff, 0x488a },
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@ -551,20 +551,20 @@ static int ael2020_setup_sr_edc(struct cphy *phy)
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static int ael2020_setup_twinax_edc(struct cphy *phy, int modtype)
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{
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/* set uC to 40MHz */
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static struct reg_val uCclock40MHz[] = {
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static const struct reg_val uCclock40MHz[] = {
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{ MDIO_MMD_PMAPMD, 0xff28, 0xffff, 0x4001 },
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{ MDIO_MMD_PMAPMD, 0xff2a, 0xffff, 0x0002 },
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{ 0, 0, 0, 0 }
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};
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/* activate uC clock */
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static struct reg_val uCclockActivate[] = {
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static const struct reg_val uCclockActivate[] = {
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{ MDIO_MMD_PMAPMD, 0xd000, 0xffff, 0x5200 },
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{ 0, 0, 0, 0 }
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};
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/* set PC to start of SRAM and activate uC */
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static struct reg_val uCactivate[] = {
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static const struct reg_val uCactivate[] = {
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{ MDIO_MMD_PMAPMD, 0xd080, 0xffff, 0x0100 },
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{ MDIO_MMD_PMAPMD, 0xd092, 0xffff, 0x0000 },
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{ 0, 0, 0, 0 }
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@ -624,7 +624,7 @@ static int ael2020_get_module_type(struct cphy *phy, int delay_ms)
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*/
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static int ael2020_intr_enable(struct cphy *phy)
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{
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struct reg_val regs[] = {
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static const struct reg_val regs[] = {
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/* output Module's Loss Of Signal (LOS) to LED */
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{ MDIO_MMD_PMAPMD, AEL2020_GPIO_CFG+AEL2020_GPIO_LSTAT,
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0xffff, 0x4 },
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@ -664,7 +664,7 @@ static int ael2020_intr_enable(struct cphy *phy)
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*/
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static int ael2020_intr_disable(struct cphy *phy)
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{
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struct reg_val regs[] = {
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static const struct reg_val regs[] = {
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/* reset "link status" LED to "off" */
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{ MDIO_MMD_PMAPMD, AEL2020_GPIO_CTRL,
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0xffff, 0xb << (AEL2020_GPIO_LSTAT*4) },
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@ -701,7 +701,7 @@ static int ael2020_intr_clear(struct cphy *phy)
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return err ? err : t3_phy_lasi_intr_clear(phy);
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}
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static struct reg_val ael2020_reset_regs[] = {
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static const struct reg_val ael2020_reset_regs[] = {
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/* Erratum #2: CDRLOL asserted, causing PMA link down status */
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{ MDIO_MMD_PMAPMD, 0xc003, 0xffff, 0x3101 },
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@ -1562,7 +1562,7 @@ static void tp_intr_handler(struct adapter *adapter)
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{0}
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};
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static struct intr_info tp_intr_info_t3c[] = {
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static const struct intr_info tp_intr_info_t3c[] = {
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{0x1fffffff, "TP parity error", -1, 1},
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{F_FLMRXFLSTEMPTY, "TP out of Rx pages", -1, 1},
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{F_FLMTXFLSTEMPTY, "TP out of Tx pages", -1, 1},
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@ -116,7 +116,7 @@ static void dump_mbox(struct adapter *adapter, const char *tag, u32 mbox_data)
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int t4vf_wr_mbox_core(struct adapter *adapter, const void *cmd, int size,
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void *rpl, bool sleep_ok)
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{
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static int delay[] = {
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static const int delay[] = {
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1, 1, 3, 5, 10, 10, 20, 50, 100
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};
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@ -199,7 +199,7 @@ static int act200l_reset(struct sir_dev *dev)
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{
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unsigned state = dev->fsm.substate;
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unsigned delay = 0;
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u8 control[9] = {
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static const u8 control[9] = {
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ACT200L_REG15,
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ACT200L_REG13 | ACT200L_SHDW,
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ACT200L_REG21 | ACT200L_EXCK | ACT200L_OSCL,
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@ -818,9 +818,9 @@ toshoboe_probe (struct toshoboe_cb *self)
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{
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int i, j, n;
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#ifdef USE_MIR
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int bauds[] = { 9600, 115200, 4000000, 1152000 };
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static const int bauds[] = { 9600, 115200, 4000000, 1152000 };
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#else
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int bauds[] = { 9600, 115200, 4000000 };
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static const int bauds[] = { 9600, 115200, 4000000 };
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#endif
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unsigned long flags;
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@ -655,7 +655,7 @@ nx_p3_sre_macaddr_change(struct netxen_adapter *adapter, u8 *addr, unsigned op)
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}
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static int nx_p3_nic_add_mac(struct netxen_adapter *adapter,
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u8 *addr, struct list_head *del_list)
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const u8 *addr, struct list_head *del_list)
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{
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struct list_head *head;
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nx_mac_list_t *cur;
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@ -686,7 +686,9 @@ static void netxen_p3_nic_set_multi(struct net_device *netdev)
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{
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struct netxen_adapter *adapter = netdev_priv(netdev);
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struct netdev_hw_addr *ha;
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u8 bcast_addr[ETH_ALEN] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff };
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static const u8 bcast_addr[ETH_ALEN] = {
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff
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};
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u32 mode = VPORT_MISS_MODE_DROP;
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LIST_HEAD(del_list);
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struct list_head *head;
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@ -869,9 +871,11 @@ int netxen_config_rss(struct netxen_adapter *adapter, int enable)
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u64 word;
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int i, rv;
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u64 key[] = { 0xbeac01fa6a42b73bULL, 0x8030f20c77cb2da3ULL,
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0xae7b30b4d0ca2bcbULL, 0x43a38fb04167253dULL,
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0x255b0ec26d5a56daULL };
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static const u64 key[] = {
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0xbeac01fa6a42b73bULL, 0x8030f20c77cb2da3ULL,
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0xae7b30b4d0ca2bcbULL, 0x43a38fb04167253dULL,
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0x255b0ec26d5a56daULL
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};
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memset(&req, 0, sizeof(nx_nic_req_t));
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@ -895,7 +899,7 @@ int netxen_config_rss(struct netxen_adapter *adapter, int enable)
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((u64)(enable & 0x1) << 8) |
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((0x7ULL) << 48);
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req.words[0] = cpu_to_le64(word);
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for (i = 0; i < 5; i++)
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for (i = 0; i < ARRAY_SIZE(key); i++)
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req.words[i+1] = cpu_to_le64(key[i]);
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@ -1291,7 +1291,7 @@ updateCRC
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static void updateCRC(int *CRC, int bit)
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{
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int poly[]={
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static const int poly[]={
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1,1,1,0, 1,1,0,1,
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1,0,1,1, 1,0,0,0,
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1,0,0,0, 0,0,1,1,
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@ -381,7 +381,7 @@ qlcnic_sre_macaddr_change(struct qlcnic_adapter *adapter, u8 *addr,
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return qlcnic_send_cmd_descs(adapter, (struct cmd_desc_type0 *)&req, 1);
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}
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static int qlcnic_nic_add_mac(struct qlcnic_adapter *adapter, u8 *addr)
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static int qlcnic_nic_add_mac(struct qlcnic_adapter *adapter, const u8 *addr)
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{
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struct list_head *head;
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struct qlcnic_mac_list_s *cur;
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@ -415,7 +415,9 @@ void qlcnic_set_multi(struct net_device *netdev)
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{
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struct qlcnic_adapter *adapter = netdev_priv(netdev);
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struct netdev_hw_addr *ha;
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u8 bcast_addr[ETH_ALEN] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff };
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static const u8 bcast_addr[ETH_ALEN] = {
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff
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};
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u32 mode = VPORT_MISS_MODE_DROP;
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if (!test_bit(__QLCNIC_FW_ATTACHED, &adapter->state))
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@ -621,10 +623,11 @@ int qlcnic_config_rss(struct qlcnic_adapter *adapter, int enable)
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u64 word;
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int i, rv;
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const u64 key[] = { 0xbeac01fa6a42b73bULL, 0x8030f20c77cb2da3ULL,
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0xae7b30b4d0ca2bcbULL, 0x43a38fb04167253dULL,
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0x255b0ec26d5a56daULL };
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static const u64 key[] = {
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0xbeac01fa6a42b73bULL, 0x8030f20c77cb2da3ULL,
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0xae7b30b4d0ca2bcbULL, 0x43a38fb04167253dULL,
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0x255b0ec26d5a56daULL
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};
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memset(&req, 0, sizeof(struct qlcnic_nic_req));
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req.qhdr = cpu_to_le64(QLCNIC_HOST_REQUEST << 23);
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@ -3548,12 +3548,13 @@ static int ql_request_irq(struct ql_adapter *qdev)
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static int ql_start_rss(struct ql_adapter *qdev)
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{
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u8 init_hash_seed[] = {0x6d, 0x5a, 0x56, 0xda, 0x25, 0x5b, 0x0e, 0xc2,
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0x41, 0x67, 0x25, 0x3d, 0x43, 0xa3, 0x8f,
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0xb0, 0xd0, 0xca, 0x2b, 0xcb, 0xae, 0x7b,
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0x30, 0xb4, 0x77, 0xcb, 0x2d, 0xa3, 0x80,
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0x30, 0xf2, 0x0c, 0x6a, 0x42, 0xb7, 0x3b,
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0xbe, 0xac, 0x01, 0xfa};
|
||||
static const u8 init_hash_seed[] = {
|
||||
0x6d, 0x5a, 0x56, 0xda, 0x25, 0x5b, 0x0e, 0xc2,
|
||||
0x41, 0x67, 0x25, 0x3d, 0x43, 0xa3, 0x8f, 0xb0,
|
||||
0xd0, 0xca, 0x2b, 0xcb, 0xae, 0x7b, 0x30, 0xb4,
|
||||
0x77, 0xcb, 0x2d, 0xa3, 0x80, 0x30, 0xf2, 0x0c,
|
||||
0x6a, 0x42, 0xb7, 0x3b, 0xbe, 0xac, 0x01, 0xfa
|
||||
};
|
||||
struct ricb *ricb = &qdev->ricb;
|
||||
int status = 0;
|
||||
int i;
|
||||
|
|
|
|||
|
|
@ -1263,7 +1263,7 @@ void smt_set_timestamp(struct s_smc *smc, u_char *p)
|
|||
static void smt_fill_policy(struct s_smc *smc, struct smt_p_policy *policy)
|
||||
{
|
||||
int i ;
|
||||
u_char *map ;
|
||||
const u_char *map ;
|
||||
u_short in ;
|
||||
u_short out ;
|
||||
|
||||
|
|
@ -1271,7 +1271,7 @@ static void smt_fill_policy(struct s_smc *smc, struct smt_p_policy *policy)
|
|||
* MIB para 101b (fddiSMTConnectionPolicy) coding
|
||||
* is different from 0005 coding
|
||||
*/
|
||||
static u_char ansi_weirdness[16] = {
|
||||
static const u_char ansi_weirdness[16] = {
|
||||
0,7,5,3,8,1,6,4,9,10,2,11,12,13,14,15
|
||||
} ;
|
||||
SMTSETPARA(policy,SMT_P_POLICY) ;
|
||||
|
|
|
|||
|
|
@ -657,8 +657,9 @@ static int __devinit ibmtr_probe1(struct net_device *dev, int PIOaddr)
|
|||
#ifndef PCMCIA
|
||||
/* finish figuring the shared RAM address */
|
||||
if (cardpresent == TR_ISA) {
|
||||
static __u32 ram_bndry_mask[] =
|
||||
{ 0xffffe000, 0xffffc000, 0xffff8000, 0xffff0000 };
|
||||
static const __u32 ram_bndry_mask[] = {
|
||||
0xffffe000, 0xffffc000, 0xffff8000, 0xffff0000
|
||||
};
|
||||
__u32 new_base, rrr_32, chk_base, rbm;
|
||||
|
||||
rrr_32=readb(ti->mmio+ACA_OFFSET+ACA_RW+RRR_ODD) >> 2 & 0x03;
|
||||
|
|
|
|||
|
|
@ -964,7 +964,7 @@ static void de_set_media (struct de_private *de)
|
|||
dw32(MacMode, macmode);
|
||||
}
|
||||
|
||||
static void de_next_media (struct de_private *de, u32 *media,
|
||||
static void de_next_media (struct de_private *de, const u32 *media,
|
||||
unsigned int n_media)
|
||||
{
|
||||
unsigned int i;
|
||||
|
|
@ -1008,10 +1008,10 @@ static void de21040_media_timer (unsigned long data)
|
|||
return;
|
||||
|
||||
if (de->media_type == DE_MEDIA_AUI) {
|
||||
u32 next_state = DE_MEDIA_TP;
|
||||
static const u32 next_state = DE_MEDIA_TP;
|
||||
de_next_media(de, &next_state, 1);
|
||||
} else {
|
||||
u32 next_state = DE_MEDIA_AUI;
|
||||
static const u32 next_state = DE_MEDIA_AUI;
|
||||
de_next_media(de, &next_state, 1);
|
||||
}
|
||||
|
||||
|
|
@ -1136,13 +1136,19 @@ static void de21041_media_timer (unsigned long data)
|
|||
* simply resets the PHY and reloads the current media settings.
|
||||
*/
|
||||
if (de->media_type == DE_MEDIA_AUI) {
|
||||
u32 next_states[] = { DE_MEDIA_BNC, DE_MEDIA_TP_AUTO };
|
||||
static const u32 next_states[] = {
|
||||
DE_MEDIA_BNC, DE_MEDIA_TP_AUTO
|
||||
};
|
||||
de_next_media(de, next_states, ARRAY_SIZE(next_states));
|
||||
} else if (de->media_type == DE_MEDIA_BNC) {
|
||||
u32 next_states[] = { DE_MEDIA_TP_AUTO, DE_MEDIA_AUI };
|
||||
static const u32 next_states[] = {
|
||||
DE_MEDIA_TP_AUTO, DE_MEDIA_AUI
|
||||
};
|
||||
de_next_media(de, next_states, ARRAY_SIZE(next_states));
|
||||
} else {
|
||||
u32 next_states[] = { DE_MEDIA_AUI, DE_MEDIA_BNC, DE_MEDIA_TP_AUTO };
|
||||
static const u32 next_states[] = {
|
||||
DE_MEDIA_AUI, DE_MEDIA_BNC, DE_MEDIA_TP_AUTO
|
||||
};
|
||||
de_next_media(de, next_states, ARRAY_SIZE(next_states));
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -1131,7 +1131,9 @@ static int
|
|||
vmxnet3_rq_rx_complete(struct vmxnet3_rx_queue *rq,
|
||||
struct vmxnet3_adapter *adapter, int quota)
|
||||
{
|
||||
static u32 rxprod_reg[2] = {VMXNET3_REG_RXPROD, VMXNET3_REG_RXPROD2};
|
||||
static const u32 rxprod_reg[2] = {
|
||||
VMXNET3_REG_RXPROD, VMXNET3_REG_RXPROD2
|
||||
};
|
||||
u32 num_rxd = 0;
|
||||
struct Vmxnet3_RxCompDesc *rcd;
|
||||
struct vmxnet3_rx_ctx *ctx = &rq->rx_ctx;
|
||||
|
|
|
|||
|
|
@ -1358,7 +1358,7 @@ static int dscc4_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
|
|||
return ret;
|
||||
}
|
||||
|
||||
static int dscc4_match(struct thingie *p, int value)
|
||||
static int dscc4_match(const struct thingie *p, int value)
|
||||
{
|
||||
int i;
|
||||
|
||||
|
|
@ -1403,7 +1403,7 @@ static int dscc4_clock_setting(struct dscc4_dev_priv *dpriv,
|
|||
static int dscc4_encoding_setting(struct dscc4_dev_priv *dpriv,
|
||||
struct net_device *dev)
|
||||
{
|
||||
struct thingie encoding[] = {
|
||||
static const struct thingie encoding[] = {
|
||||
{ ENCODING_NRZ, 0x00000000 },
|
||||
{ ENCODING_NRZI, 0x00200000 },
|
||||
{ ENCODING_FM_MARK, 0x00400000 },
|
||||
|
|
@ -1442,7 +1442,7 @@ static int dscc4_loopback_setting(struct dscc4_dev_priv *dpriv,
|
|||
static int dscc4_crc_setting(struct dscc4_dev_priv *dpriv,
|
||||
struct net_device *dev)
|
||||
{
|
||||
struct thingie crc[] = {
|
||||
static const struct thingie crc[] = {
|
||||
{ PARITY_CRC16_PR0_CCITT, 0x00000010 },
|
||||
{ PARITY_CRC16_PR1_CCITT, 0x00000000 },
|
||||
{ PARITY_CRC32_PR0_CCITT, 0x00000011 },
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user