forked from luck/tmp_suning_uos_patched
svga: Make svga_wcrt_multi take an iomem regbase pointer.
Signed-off-by: David S. Miller <davem@davemloft.net> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This commit is contained in:
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f6b0cc477d
commit
21da386d0e
@ -657,8 +657,8 @@ static int arkfb_set_par(struct fb_info *info)
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svga_set_default_atc_regs();
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svga_set_default_seq_regs();
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svga_set_default_crt_regs();
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svga_wcrt_multi(ark_line_compare_regs, 0xFFFFFFFF);
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svga_wcrt_multi(ark_start_address_regs, 0);
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svga_wcrt_multi(par->state.vgabase, ark_line_compare_regs, 0xFFFFFFFF);
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svga_wcrt_multi(par->state.vgabase, ark_start_address_regs, 0);
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/* ARK specific initialization */
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svga_wseq_mask(0x10, 0x1F, 0x1F); /* enable linear framebuffer and full memory access */
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@ -676,7 +676,7 @@ static int arkfb_set_par(struct fb_info *info)
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/* Set the offset register */
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pr_debug("fb%d: offset register : %d\n", info->node, offset_value);
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svga_wcrt_multi(ark_offset_regs, offset_value);
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svga_wcrt_multi(par->state.vgabase, ark_offset_regs, offset_value);
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/* fix for hi-res textmode */
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svga_wcrt_mask(0x40, 0x08, 0x08);
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@ -884,6 +884,7 @@ static int arkfb_blank(int blank_mode, struct fb_info *info)
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static int arkfb_pan_display(struct fb_var_screeninfo *var, struct fb_info *info)
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{
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struct arkfb_info *par = info->par;
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unsigned int offset;
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/* Calculate the offset */
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@ -897,7 +898,7 @@ static int arkfb_pan_display(struct fb_var_screeninfo *var, struct fb_info *info
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}
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/* Set the offset */
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svga_wcrt_multi(ark_start_address_regs, offset);
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svga_wcrt_multi(par->state.vgabase, ark_start_address_regs, offset);
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return 0;
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}
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@ -518,8 +518,8 @@ static int s3fb_set_par(struct fb_info *info)
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svga_set_default_atc_regs();
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svga_set_default_seq_regs();
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svga_set_default_crt_regs();
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svga_wcrt_multi(s3_line_compare_regs, 0xFFFFFFFF);
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svga_wcrt_multi(s3_start_address_regs, 0);
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svga_wcrt_multi(par->state.vgabase, s3_line_compare_regs, 0xFFFFFFFF);
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svga_wcrt_multi(par->state.vgabase, s3_start_address_regs, 0);
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/* S3 specific initialization */
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svga_wcrt_mask(0x58, 0x10, 0x10); /* enable linear framebuffer */
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@ -540,7 +540,7 @@ static int s3fb_set_par(struct fb_info *info)
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/* Set the offset register */
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pr_debug("fb%d: offset register : %d\n", info->node, offset_value);
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svga_wcrt_multi(s3_offset_regs, offset_value);
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svga_wcrt_multi(par->state.vgabase, s3_offset_regs, offset_value);
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if (par->chip != CHIP_360_TRIO3D_1X &&
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par->chip != CHIP_362_TRIO3D_2X &&
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@ -822,8 +822,9 @@ static int s3fb_blank(int blank_mode, struct fb_info *info)
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/* Pan the display */
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static int s3fb_pan_display(struct fb_var_screeninfo *var, struct fb_info *info) {
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static int s3fb_pan_display(struct fb_var_screeninfo *var, struct fb_info *info)
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{
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struct s3fb_info *par = info->par;
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unsigned int offset;
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/* Calculate the offset */
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@ -837,7 +838,7 @@ static int s3fb_pan_display(struct fb_var_screeninfo *var, struct fb_info *info)
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}
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/* Set the offset */
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svga_wcrt_multi(s3_start_address_regs, offset);
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svga_wcrt_multi(par->state.vgabase, s3_start_address_regs, offset);
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return 0;
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}
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@ -20,12 +20,12 @@
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/* Write a CRT register value spread across multiple registers */
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void svga_wcrt_multi(const struct vga_regset *regset, u32 value) {
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void svga_wcrt_multi(void __iomem *regbase, const struct vga_regset *regset, u32 value)
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{
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u8 regval, bitval, bitnum;
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while (regset->regnum != VGA_REGSET_END_VAL) {
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regval = vga_rcrt(NULL, regset->regnum);
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regval = vga_rcrt(regbase, regset->regnum);
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bitnum = regset->lowbit;
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while (bitnum <= regset->highbit) {
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bitval = 1 << bitnum;
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@ -34,7 +34,7 @@ void svga_wcrt_multi(const struct vga_regset *regset, u32 value) {
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bitnum ++;
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value = value >> 1;
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}
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vga_wcrt(NULL, regset->regnum, regval);
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vga_wcrt(regbase, regset->regnum, regval);
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regset ++;
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}
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}
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@ -516,62 +516,62 @@ void svga_set_timings(const struct svga_timing_regs *tm, struct fb_var_screeninf
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value = var->xres + var->left_margin + var->right_margin + var->hsync_len;
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value = (value * hmul) / hdiv;
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pr_debug("fb%d: horizontal total : %d\n", node, value);
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svga_wcrt_multi(tm->h_total_regs, (value / 8) - 5);
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svga_wcrt_multi(NULL, tm->h_total_regs, (value / 8) - 5);
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value = var->xres;
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value = (value * hmul) / hdiv;
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pr_debug("fb%d: horizontal display : %d\n", node, value);
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svga_wcrt_multi(tm->h_display_regs, (value / 8) - 1);
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svga_wcrt_multi(NULL, tm->h_display_regs, (value / 8) - 1);
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value = var->xres;
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value = (value * hmul) / hdiv;
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pr_debug("fb%d: horizontal blank start: %d\n", node, value);
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svga_wcrt_multi(tm->h_blank_start_regs, (value / 8) - 1 + hborder);
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svga_wcrt_multi(NULL, tm->h_blank_start_regs, (value / 8) - 1 + hborder);
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value = var->xres + var->left_margin + var->right_margin + var->hsync_len;
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value = (value * hmul) / hdiv;
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pr_debug("fb%d: horizontal blank end : %d\n", node, value);
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svga_wcrt_multi(tm->h_blank_end_regs, (value / 8) - 1 - hborder);
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svga_wcrt_multi(NULL, tm->h_blank_end_regs, (value / 8) - 1 - hborder);
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value = var->xres + var->right_margin;
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value = (value * hmul) / hdiv;
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pr_debug("fb%d: horizontal sync start : %d\n", node, value);
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svga_wcrt_multi(tm->h_sync_start_regs, (value / 8));
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svga_wcrt_multi(NULL, tm->h_sync_start_regs, (value / 8));
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value = var->xres + var->right_margin + var->hsync_len;
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value = (value * hmul) / hdiv;
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pr_debug("fb%d: horizontal sync end : %d\n", node, value);
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svga_wcrt_multi(tm->h_sync_end_regs, (value / 8));
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svga_wcrt_multi(NULL, tm->h_sync_end_regs, (value / 8));
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value = var->yres + var->upper_margin + var->lower_margin + var->vsync_len;
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value = (value * vmul) / vdiv;
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pr_debug("fb%d: vertical total : %d\n", node, value);
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svga_wcrt_multi(tm->v_total_regs, value - 2);
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svga_wcrt_multi(NULL, tm->v_total_regs, value - 2);
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value = var->yres;
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value = (value * vmul) / vdiv;
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pr_debug("fb%d: vertical display : %d\n", node, value);
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svga_wcrt_multi(tm->v_display_regs, value - 1);
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svga_wcrt_multi(NULL, tm->v_display_regs, value - 1);
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value = var->yres;
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value = (value * vmul) / vdiv;
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pr_debug("fb%d: vertical blank start : %d\n", node, value);
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svga_wcrt_multi(tm->v_blank_start_regs, value);
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svga_wcrt_multi(NULL, tm->v_blank_start_regs, value);
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value = var->yres + var->upper_margin + var->lower_margin + var->vsync_len;
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value = (value * vmul) / vdiv;
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pr_debug("fb%d: vertical blank end : %d\n", node, value);
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svga_wcrt_multi(tm->v_blank_end_regs, value - 2);
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svga_wcrt_multi(NULL, tm->v_blank_end_regs, value - 2);
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value = var->yres + var->lower_margin;
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value = (value * vmul) / vdiv;
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pr_debug("fb%d: vertical sync start : %d\n", node, value);
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svga_wcrt_multi(tm->v_sync_start_regs, value);
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svga_wcrt_multi(NULL, tm->v_sync_start_regs, value);
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value = var->yres + var->lower_margin + var->vsync_len;
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value = (value * vmul) / vdiv;
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pr_debug("fb%d: vertical sync end : %d\n", node, value);
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svga_wcrt_multi(tm->v_sync_end_regs, value);
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svga_wcrt_multi(NULL, tm->v_sync_end_regs, value);
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/* Set horizontal and vertical sync pulse polarity in misc register */
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@ -373,6 +373,7 @@ static int vt8623fb_check_var(struct fb_var_screeninfo *var, struct fb_info *inf
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static int vt8623fb_set_par(struct fb_info *info)
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{
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u32 mode, offset_value, fetch_value, screen_size;
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struct vt8623fb_info *par = info->par;
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u32 bpp = info->var.bits_per_pixel;
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if (bpp != 0) {
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@ -428,10 +429,10 @@ static int vt8623fb_set_par(struct fb_info *info)
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svga_set_default_atc_regs();
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svga_set_default_seq_regs();
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svga_set_default_crt_regs();
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svga_wcrt_multi(vt8623_line_compare_regs, 0xFFFFFFFF);
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svga_wcrt_multi(vt8623_start_address_regs, 0);
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svga_wcrt_multi(par->state.vgabase, vt8623_line_compare_regs, 0xFFFFFFFF);
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svga_wcrt_multi(par->state.vgabase, vt8623_start_address_regs, 0);
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svga_wcrt_multi(vt8623_offset_regs, offset_value);
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svga_wcrt_multi(par->state.vgabase, vt8623_offset_regs, offset_value);
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svga_wseq_multi(vt8623_fetch_count_regs, fetch_value);
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/* Clear H/V Skew */
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@ -603,6 +604,7 @@ static int vt8623fb_blank(int blank_mode, struct fb_info *info)
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static int vt8623fb_pan_display(struct fb_var_screeninfo *var, struct fb_info *info)
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{
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struct vt8623fb_info *par = info->par;
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unsigned int offset;
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/* Calculate the offset */
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@ -616,7 +618,7 @@ static int vt8623fb_pan_display(struct fb_var_screeninfo *var, struct fb_info *i
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}
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/* Set the offset */
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svga_wcrt_multi(vt8623_start_address_regs, offset);
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svga_wcrt_multi(par->state.vgabase, vt8623_start_address_regs, offset);
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return 0;
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}
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@ -96,7 +96,7 @@ static inline int svga_primary_device(struct pci_dev *dev)
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}
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void svga_wcrt_multi(const struct vga_regset *regset, u32 value);
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void svga_wcrt_multi(void __iomem *regbase, const struct vga_regset *regset, u32 value);
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void svga_wseq_multi(const struct vga_regset *regset, u32 value);
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void svga_set_default_gfx_regs(void);
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