forked from luck/tmp_suning_uos_patched
ARC: [SMP] Enable icache coherency
icaches are not snooped hence not cohrent in SMP setups which means kernel has to do cross core calls to ensure the same. The leaf routine __ic_line_inv_vaddr() now does cross core calls. __sync_icache_dcache() is affected due to this: * local dcache line flushed ahead of remote icache inv requests * can't disable interrupts anymore, since __ic_line_inv_vaddr()->on_each_cpu() can deadlock. | WARNING: CPU: 0 PID: 1 at kernel/smp.c:374 | smp_call_function_many+0x25a/0x2c4() | | init_kprobes+0x90/0xc8 | register_kprobe+0x1d6/0x510 | __sync_icache_dcache+0x28/0x80 | | DISABLE IRQ | | __ic_line_inv_vaddr | on_each_cpu | smp_call_function_many+0x25a/0x2c4 --> WARN | __ic_line_inv_vaddr_local | __dc_line_op * TODO: Needs to use mask of relevant CPUs to avoid broadcasting Signed-off-by: Noam Camus <noamc@ezchip.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
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@ -389,7 +389,7 @@ static inline void __dc_line_op(unsigned long paddr, unsigned long vaddr,
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/***********************************************************
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* Machine specific helper for per line I-Cache invalidate.
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*/
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static void __ic_line_inv_vaddr(unsigned long paddr, unsigned long vaddr,
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static void __ic_line_inv_vaddr_local(unsigned long paddr, unsigned long vaddr,
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unsigned long sz)
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{
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unsigned long flags;
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@ -405,6 +405,23 @@ static inline void __ic_entire_inv(void)
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read_aux_reg(ARC_REG_IC_CTRL); /* blocks */
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}
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struct ic_line_inv_vaddr_ipi {
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unsigned long paddr, vaddr;
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int sz;
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};
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static void __ic_line_inv_vaddr_helper(void *info)
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{
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struct ic_line_inv_vaddr_ipi *ic_inv = (struct ic_line_inv_vaddr_ipi*) info;
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__ic_line_inv_vaddr_local(ic_inv->paddr, ic_inv->vaddr, ic_inv->sz);
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}
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static void __ic_line_inv_vaddr(unsigned long paddr, unsigned long vaddr,
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unsigned long sz)
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{
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struct ic_line_inv_vaddr_ipi ic_inv = { paddr, vaddr , sz};
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on_each_cpu(__ic_line_inv_vaddr_helper, &ic_inv, 1);
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}
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#else
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#define __ic_entire_inv()
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@ -553,12 +570,8 @@ void flush_icache_range(unsigned long kstart, unsigned long kend)
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*/
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void __sync_icache_dcache(unsigned long paddr, unsigned long vaddr, int len)
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{
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unsigned long flags;
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local_irq_save(flags);
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__ic_line_inv_vaddr(paddr, vaddr, len);
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__dc_line_op(paddr, vaddr, len, OP_FLUSH_N_INV);
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local_irq_restore(flags);
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__ic_line_inv_vaddr(paddr, vaddr, len);
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}
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/* wrapper to compile time eliminate alignment checks in flush loop */
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