forked from luck/tmp_suning_uos_patched
sparc64/pci_sun4v: allow large DMA masks
We've been moving to a model where the device just sets the DMA mask supported by it, instead of having to fallback to something it thinks the platform might support. Sparc64 is the remaining holdout forcing drivers to supply a matching mask. Change dma_4v_supported to just check if the supplied dma mask is large enough. and adjust the mapping code to check ATU presence in addition to the DMA mask to decide on the mapping method. Signed-off-by: Christoph Hellwig <hch@lst.de> Acked-by: David S. Miller <davem@davemloft.net>
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@ -92,7 +92,7 @@ static long iommu_batch_flush(struct iommu_batch *p, u64 mask)
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prot &= (HV_PCI_MAP_ATTR_READ | HV_PCI_MAP_ATTR_WRITE);
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while (npages != 0) {
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if (mask <= DMA_BIT_MASK(32)) {
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if (mask <= DMA_BIT_MASK(32) || !pbm->iommu->atu) {
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num = pci_sun4v_iommu_map(devhandle,
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HV_PCI_TSBID(0, entry),
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npages,
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@ -208,7 +208,7 @@ static void *dma_4v_alloc_coherent(struct device *dev, size_t size,
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atu = iommu->atu;
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mask = dev->coherent_dma_mask;
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if (mask <= DMA_BIT_MASK(32))
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if (mask <= DMA_BIT_MASK(32) || !atu)
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tbl = &iommu->tbl;
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else
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tbl = &atu->tbl;
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@ -674,21 +674,12 @@ static void dma_4v_unmap_sg(struct device *dev, struct scatterlist *sglist,
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static int dma_4v_supported(struct device *dev, u64 device_mask)
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{
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struct iommu *iommu = dev->archdata.iommu;
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u64 dma_addr_mask = iommu->dma_addr_mask;
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if (ali_sound_dma_hack(dev, device_mask))
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return 1;
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if (device_mask > DMA_BIT_MASK(32)) {
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if (iommu->atu)
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dma_addr_mask = iommu->atu->dma_addr_mask;
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else
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return 0;
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}
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if ((device_mask & dma_addr_mask) == dma_addr_mask)
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return 1;
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return 0;
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if (device_mask < iommu->dma_addr_mask)
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return 0;
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return 1;
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}
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static const struct dma_map_ops sun4v_dma_ops = {
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