forked from luck/tmp_suning_uos_patched
bnx2x: Fix BCM578x0-SFI pre-emphasis settings
Fix 578x0-SFI pre-emphasis settings per HW recommendations to achieve better link strength. Signed-off-by: Yaniv Rosner <yanivr@broadcom.com> Signed-off-by: Eilon Greenstein <eilong@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -3994,13 +3994,13 @@ static void bnx2x_warpcore_set_10G_XFI(struct bnx2x_phy *phy,
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} else {
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} else {
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misc1_val |= 0x9;
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misc1_val |= 0x9;
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tap_val = ((0x12 << MDIO_WC_REG_TX_FIR_TAP_POST_TAP_OFFSET) |
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tap_val = ((0x0f << MDIO_WC_REG_TX_FIR_TAP_POST_TAP_OFFSET) |
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(0x2d << MDIO_WC_REG_TX_FIR_TAP_MAIN_TAP_OFFSET) |
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(0x2b << MDIO_WC_REG_TX_FIR_TAP_MAIN_TAP_OFFSET) |
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(0x00 << MDIO_WC_REG_TX_FIR_TAP_PRE_TAP_OFFSET));
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(0x02 << MDIO_WC_REG_TX_FIR_TAP_PRE_TAP_OFFSET));
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tx_driver_val =
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tx_driver_val =
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((0x02 << MDIO_WC_REG_TX0_TX_DRIVER_POST2_COEFF_OFFSET) |
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((0x03 << MDIO_WC_REG_TX0_TX_DRIVER_POST2_COEFF_OFFSET) |
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(0x02 << MDIO_WC_REG_TX0_TX_DRIVER_IDRIVER_OFFSET) |
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(0x02 << MDIO_WC_REG_TX0_TX_DRIVER_IDRIVER_OFFSET) |
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(0x02 << MDIO_WC_REG_TX0_TX_DRIVER_IPRE_DRIVER_OFFSET));
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(0x06 << MDIO_WC_REG_TX0_TX_DRIVER_IPRE_DRIVER_OFFSET));
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}
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}
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bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD,
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bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD,
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MDIO_WC_REG_SERDESDIGITAL_MISC1, misc1_val);
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MDIO_WC_REG_SERDESDIGITAL_MISC1, misc1_val);
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