forked from luck/tmp_suning_uos_patched
[media] adv7842: replace uintX_t by uX for consistency
Currently this driver mixes u8/u32 and uint8_t/uint32_t. Standardize on u8/u32. Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
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@ -1556,7 +1556,7 @@ static int adv7842_query_dv_timings(struct v4l2_subdev *sd,
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V4L2_DV_BT_STD_GTF | V4L2_DV_BT_STD_CVT;
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if (is_digital_input(sd)) {
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uint32_t freq;
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u32 freq;
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timings->type = V4L2_DV_BT_656_1120;
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@ -2334,7 +2334,7 @@ struct adv7842_cfg_read_infoframe {
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static void log_infoframe(struct v4l2_subdev *sd, struct adv7842_cfg_read_infoframe *cri)
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{
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int i;
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uint8_t buffer[32];
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u8 buffer[32];
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union hdmi_infoframe frame;
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u8 len;
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struct i2c_client *client = v4l2_get_subdevdata(sd);
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@ -2407,7 +2407,7 @@ static const char * const prim_mode_txt[] = {
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static int adv7842_sdp_log_status(struct v4l2_subdev *sd)
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{
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/* SDP (Standard definition processor) block */
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uint8_t sdp_signal_detected = sdp_read(sd, 0x5A) & 0x01;
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u8 sdp_signal_detected = sdp_read(sd, 0x5A) & 0x01;
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v4l2_info(sd, "Chip powered %s\n", no_power(sd) ? "off" : "on");
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v4l2_info(sd, "Prim-mode = 0x%x, video std = 0x%x\n",
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@ -2451,10 +2451,10 @@ static int adv7842_cp_log_status(struct v4l2_subdev *sd)
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/* CP block */
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struct adv7842_state *state = to_state(sd);
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struct v4l2_dv_timings timings;
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uint8_t reg_io_0x02 = io_read(sd, 0x02);
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uint8_t reg_io_0x21 = io_read(sd, 0x21);
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uint8_t reg_rep_0x77 = rep_read(sd, 0x77);
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uint8_t reg_rep_0x7d = rep_read(sd, 0x7d);
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u8 reg_io_0x02 = io_read(sd, 0x02);
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u8 reg_io_0x21 = io_read(sd, 0x21);
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u8 reg_rep_0x77 = rep_read(sd, 0x77);
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u8 reg_rep_0x7d = rep_read(sd, 0x7d);
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bool audio_pll_locked = hdmi_read(sd, 0x04) & 0x01;
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bool audio_sample_packet_detect = hdmi_read(sd, 0x18) & 0x01;
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bool audio_mute = io_read(sd, 0x65) & 0x40;
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@ -2526,10 +2526,10 @@ static int adv7842_cp_log_status(struct v4l2_subdev *sd)
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if (no_cp_signal(sd)) {
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v4l2_info(sd, "STDI: not locked\n");
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} else {
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uint32_t bl = ((cp_read(sd, 0xb1) & 0x3f) << 8) | cp_read(sd, 0xb2);
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uint32_t lcf = ((cp_read(sd, 0xb3) & 0x7) << 8) | cp_read(sd, 0xb4);
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uint32_t lcvs = cp_read(sd, 0xb3) >> 3;
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uint32_t fcl = ((cp_read(sd, 0xb8) & 0x1f) << 8) | cp_read(sd, 0xb9);
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u32 bl = ((cp_read(sd, 0xb1) & 0x3f) << 8) | cp_read(sd, 0xb2);
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u32 lcf = ((cp_read(sd, 0xb3) & 0x7) << 8) | cp_read(sd, 0xb4);
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u32 lcvs = cp_read(sd, 0xb3) >> 3;
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u32 fcl = ((cp_read(sd, 0xb8) & 0x1f) << 8) | cp_read(sd, 0xb9);
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char hs_pol = ((cp_read(sd, 0xb5) & 0x10) ?
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((cp_read(sd, 0xb5) & 0x08) ? '+' : '-') : 'x');
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char vs_pol = ((cp_read(sd, 0xb5) & 0x40) ?
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@ -103,35 +103,35 @@ enum adv7842_drive_strength {
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struct adv7842_sdp_csc_coeff {
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bool manual;
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uint16_t scaling;
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uint16_t A1;
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uint16_t A2;
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uint16_t A3;
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uint16_t A4;
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uint16_t B1;
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uint16_t B2;
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uint16_t B3;
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uint16_t B4;
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uint16_t C1;
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uint16_t C2;
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uint16_t C3;
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uint16_t C4;
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u16 scaling;
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u16 A1;
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u16 A2;
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u16 A3;
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u16 A4;
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u16 B1;
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u16 B2;
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u16 B3;
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u16 B4;
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u16 C1;
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u16 C2;
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u16 C3;
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u16 C4;
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};
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struct adv7842_sdp_io_sync_adjustment {
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bool adjust;
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uint16_t hs_beg;
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uint16_t hs_width;
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uint16_t de_beg;
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uint16_t de_end;
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uint8_t vs_beg_o;
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uint8_t vs_beg_e;
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uint8_t vs_end_o;
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uint8_t vs_end_e;
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uint8_t de_v_beg_o;
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uint8_t de_v_beg_e;
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uint8_t de_v_end_o;
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uint8_t de_v_end_e;
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u16 hs_beg;
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u16 hs_width;
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u16 de_beg;
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u16 de_end;
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u8 vs_beg_o;
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u8 vs_beg_e;
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u8 vs_end_o;
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u8 vs_end_e;
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u8 de_v_beg_o;
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u8 de_v_beg_e;
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u8 de_v_end_o;
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u8 de_v_end_e;
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};
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/* Platform dependent definition */
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