forked from luck/tmp_suning_uos_patched
ath9k_hw: Configure chain switch table and attenuation control only for active chains
Signed-off-by: Vasanthakumar Thiagarajan <vasanth@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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@ -3501,23 +3501,28 @@ static u16 ar9003_hw_ant_ctrl_chain_get(struct ath_hw *ah,
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static void ar9003_hw_ant_ctrl_apply(struct ath_hw *ah, bool is2ghz)
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{
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int chain;
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static const u32 switch_chain_reg[AR9300_MAX_CHAINS] = {
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AR_PHY_SWITCH_CHAIN_0,
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AR_PHY_SWITCH_CHAIN_1,
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AR_PHY_SWITCH_CHAIN_2,
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};
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u32 value = ar9003_hw_ant_ctrl_common_get(ah, is2ghz);
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REG_RMW_FIELD(ah, AR_PHY_SWITCH_COM, AR_SWITCH_TABLE_COM_ALL, value);
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value = ar9003_hw_ant_ctrl_common_2_get(ah, is2ghz);
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REG_RMW_FIELD(ah, AR_PHY_SWITCH_COM_2, AR_SWITCH_TABLE_COM2_ALL, value);
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value = ar9003_hw_ant_ctrl_chain_get(ah, 0, is2ghz);
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REG_RMW_FIELD(ah, AR_PHY_SWITCH_CHAIN_0, AR_SWITCH_TABLE_ALL, value);
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if (!AR_SREV_9485(ah)) {
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value = ar9003_hw_ant_ctrl_chain_get(ah, 1, is2ghz);
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REG_RMW_FIELD(ah, AR_PHY_SWITCH_CHAIN_1, AR_SWITCH_TABLE_ALL,
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value);
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value = ar9003_hw_ant_ctrl_chain_get(ah, 2, is2ghz);
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REG_RMW_FIELD(ah, AR_PHY_SWITCH_CHAIN_2, AR_SWITCH_TABLE_ALL,
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value);
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for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
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if ((ah->rxchainmask & BIT(chain)) ||
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(ah->txchainmask & BIT(chain))) {
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value = ar9003_hw_ant_ctrl_chain_get(ah, chain,
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is2ghz);
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REG_RMW_FIELD(ah, switch_chain_reg[chain],
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AR_SWITCH_TABLE_ALL, value);
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}
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}
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if (AR_SREV_9485(ah)) {
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@ -3638,13 +3643,16 @@ static void ar9003_hw_atten_apply(struct ath_hw *ah, struct ath9k_channel *chan)
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/* Test value. if 0 then attenuation is unused. Don't load anything. */
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for (i = 0; i < 3; i++) {
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value = ar9003_hw_atten_chain_get(ah, i, chan);
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REG_RMW_FIELD(ah, ext_atten_reg[i],
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AR_PHY_EXT_ATTEN_CTL_XATTEN1_DB, value);
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if (ah->txchainmask & BIT(i)) {
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value = ar9003_hw_atten_chain_get(ah, i, chan);
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REG_RMW_FIELD(ah, ext_atten_reg[i],
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AR_PHY_EXT_ATTEN_CTL_XATTEN1_DB, value);
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value = ar9003_hw_atten_chain_get_margin(ah, i, chan);
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REG_RMW_FIELD(ah, ext_atten_reg[i],
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AR_PHY_EXT_ATTEN_CTL_XATTEN1_MARGIN, value);
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value = ar9003_hw_atten_chain_get_margin(ah, i, chan);
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REG_RMW_FIELD(ah, ext_atten_reg[i],
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AR_PHY_EXT_ATTEN_CTL_XATTEN1_MARGIN,
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value);
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}
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}
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}
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