forked from luck/tmp_suning_uos_patched
s390/cio: Consolidate inline assemblies and related data definitions
Replace the current semi-arbitrary distribution of inline assemblies: - Inline assemblies used by CIO go into ioasm.h - Data definitions used by inline assemblies go into cio.h Beyond cleaning up the current structure this is also required for use of tracepoints in inline assemblies introduced by a follow-on patch. Signed-off-by: Peter Oberparleiter <oberpar@linux.vnet.ibm.com> Acked-by: Sebastian Ott <sebott@linux.vnet.ibm.com> Acked-by: Cornelia Huck <cornelia.huck@de.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
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@ -52,18 +52,4 @@ void crw_wait_for_channel_report(void);
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#define CRW_ERC_PERRI 0x07 /* perm. error, facility init */
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#define CRW_ERC_PMOD 0x08 /* installed parameters modified */
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static inline int stcrw(struct crw *pcrw)
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{
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int ccode;
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asm volatile(
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" stcrw 0(%2)\n"
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" ipm %0\n"
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" srl %0,28\n"
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: "=d" (ccode), "=m" (*pcrw)
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: "a" (pcrw)
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: "cc" );
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return ccode;
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}
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#endif /* _ASM_S390_CRW_H */
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@ -45,6 +45,18 @@ struct pmcw {
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/* ... in an operand exception. */
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} __attribute__ ((packed));
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/* I/O-Interruption Code as stored by TEST PENDING INTERRUPTION (TPI). */
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struct tpi_info {
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struct subchannel_id schid;
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u32 intparm;
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u32 adapter_IO:1;
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u32 :1;
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u32 isc:3;
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u32 :27;
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u32 type:3;
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u32 :12;
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} __packed __aligned(4);
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/* Target SCHIB configuration. */
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struct schib_config {
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u64 mba;
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@ -14,6 +14,7 @@
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#include <linux/wait.h>
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#include <asm/crw.h>
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#include <asm/ctl_reg.h>
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#include "ioasm.h"
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static DEFINE_MUTEX(crw_handler_mutex);
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static crw_handler_t crw_handlers[NR_RSCS];
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@ -169,49 +169,4 @@ struct ccw_device_private {
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enum interruption_class int_class;
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};
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static inline int rsch(struct subchannel_id schid)
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{
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register struct subchannel_id reg1 asm("1") = schid;
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int ccode;
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asm volatile(
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" rsch\n"
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" ipm %0\n"
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" srl %0,28"
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: "=d" (ccode)
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: "d" (reg1)
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: "cc", "memory");
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return ccode;
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}
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static inline int hsch(struct subchannel_id schid)
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{
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register struct subchannel_id reg1 asm("1") = schid;
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int ccode;
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asm volatile(
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" hsch\n"
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" ipm %0\n"
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" srl %0,28"
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: "=d" (ccode)
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: "d" (reg1)
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: "cc");
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return ccode;
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}
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static inline int xsch(struct subchannel_id schid)
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{
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register struct subchannel_id reg1 asm("1") = schid;
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int ccode;
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asm volatile(
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" xsch\n"
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" ipm %0\n"
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" srl %0,28"
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: "=d" (ccode)
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: "d" (reg1)
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: "cc");
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return ccode;
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}
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#endif
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@ -3,24 +3,10 @@
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#include <asm/chpid.h>
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#include <asm/schid.h>
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#include <asm/crw.h>
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#include "orb.h"
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#include "cio.h"
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/*
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* TPI info structure
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*/
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struct tpi_info {
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struct subchannel_id schid;
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__u32 intparm; /* interruption parameter */
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__u32 adapter_IO : 1;
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__u32 reserved2 : 1;
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__u32 isc : 3;
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__u32 reserved3 : 12;
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__u32 int_type : 3;
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__u32 reserved4 : 12;
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} __attribute__ ((packed));
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/*
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* Some S390 specific IO instructions as inline
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*/
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@ -149,4 +135,63 @@ static inline int rchp(struct chp_id chpid)
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return ccode;
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}
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static inline int rsch(struct subchannel_id schid)
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{
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register struct subchannel_id reg1 asm("1") = schid;
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int ccode;
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asm volatile(
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" rsch\n"
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" ipm %0\n"
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" srl %0,28"
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: "=d" (ccode)
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: "d" (reg1)
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: "cc", "memory");
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return ccode;
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}
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static inline int hsch(struct subchannel_id schid)
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{
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register struct subchannel_id reg1 asm("1") = schid;
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int ccode;
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asm volatile(
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" hsch\n"
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" ipm %0\n"
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" srl %0,28"
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: "=d" (ccode)
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: "d" (reg1)
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: "cc");
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return ccode;
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}
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static inline int xsch(struct subchannel_id schid)
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{
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register struct subchannel_id reg1 asm("1") = schid;
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int ccode;
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asm volatile(
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" xsch\n"
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" ipm %0\n"
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" srl %0,28"
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: "=d" (ccode)
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: "d" (reg1)
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: "cc");
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return ccode;
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}
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static inline int stcrw(struct crw *crw)
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{
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int ccode;
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asm volatile(
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" stcrw 0(%2)\n"
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" ipm %0\n"
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" srl %0,28\n"
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: "=d" (ccode), "=m" (*crw)
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: "a" (crw)
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: "cc");
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return ccode;
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}
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#endif
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