AcoSail/kernel_optimize_test
8
0
Fork 0
forked from luck/tmp_suning_uos_patched
Code Pull Requests Activity

Revert "dts: socfpga: Add support for SD/MMC on the SOCFPGA platform"

Browse Source 
This reverts commit d9c3f5df53, which
should not have been merged via mmc-next.  It's in arm-soc instead now.
This commit is contained in:
Chris Ball 2014-03-17 09:04:57 -04:00
parent b42b9b12e9
commit 2b5cc85135
5 changed files with 3 additions and 70 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

23
Documentation/devicetree/bindings/mmc/socfpga-dw-mshc.txt
View File

@ -1,23 +0,0 @@
* Altera SOCFPGA specific extensions to the Synopsys Designware Mobile
Storage Host Controller
The Synopsys designware mobile storage host controller is used to interface
a SoC with storage medium such as eMMC or SD/MMC cards. This file documents
differences between the core Synopsys dw mshc controller properties described
by synopsys-dw-mshc.txt and the properties used by the Altera SOCFPGA specific
extensions to the Synopsys Designware Mobile Storage Host Controller.
Required Properties:
* compatible: should be
- "altr,socfpga-dw-mshc": for Altera's SOCFPGA platform
Example:
mmc: dwmmc0@ff704000 {
compatible = "altr,socfpga-dw-mshc";
reg = <0xff704000 0x1000>;
interrupts = <0 129 4>;
#address-cells = <1>;
#size-cells = <0>;
};

17
arch/arm/boot/dts/socfpga.dtsi
View File

@ -473,17 +473,6 @@ L2: l2-cache@fffef000 {
arm,data-latency = <2 1 1>;
};
mmc: dwmmc0@ff704000 {
compatible = "altr,socfpga-dw-mshc";
reg = <0xff704000 0x1000>;
interrupts = <0 139 4>;
fifo-depth = <0x400>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&l4_mp_clk>, <&sdmmc_clk>;
clock-names = "biu", "ciu";
};
/* Local timer */
timer@fffec600 {
compatible = "arm,cortex-a9-twd-timer";
@ -538,8 +527,8 @@ rstmgr@ffd05000 {
};
sysmgr@ffd08000 {
compatible = "altr,sys-mgr", "syscon";
reg = <0xffd08000 0x4000>;
};
compatible = "altr,sys-mgr";
reg = <0xffd08000 0x4000>;
};
};
};

11
arch/arm/boot/dts/socfpga_arria5.dtsi
View File

@ -27,17 +27,6 @@ osc1 {
};
};
dwmmc0@ff704000 {
num-slots = <1>;
supports-highspeed;
broken-cd;
slot@0 {
reg = <0>;
bus-width = <4>;
};
};
serial0@ffc02000 {
clock-frequency = <100000000>;
};

11
arch/arm/boot/dts/socfpga_cyclone5.dtsi
View File

@ -28,17 +28,6 @@ osc1 {
};
};
dwmmc0@ff704000 {
num-slots = <1>;
supports-highspeed;
broken-cd;
slot@0 {
reg = <0>;
bus-width = <4>;
};
};
ethernet@ff702000 {
phy-mode = "rgmii";
phy-addr = <0xffffffff>; /* probe for phy addr */

11
arch/arm/boot/dts/socfpga_vt.dts
View File

@ -41,17 +41,6 @@ osc1 {
};
};
dwmmc0@ff704000 {
num-slots = <1>;
supports-highspeed;
broken-cd;
slot@0 {
reg = <0>;
bus-width = <4>;
};
};
ethernet@ff700000 {
phy-mode = "gmii";
status = "okay";