forked from luck/tmp_suning_uos_patched
x86/paravirt: add sysret/sysexit pvops for returning to 32-bit compatibility userspace
In a 64-bit system, we need separate sysret/sysexit operations to return to a 32-bit userspace. Signed-off-by: Jeremy Fitzhardinge <jeremy.fitzhardinge@citirx.com> Cc: xen-devel <xen-devel@lists.xensource.com> Cc: Stephen Tweedie <sct@redhat.com> Cc: Eduardo Habkost <ehabkost@redhat.com> Cc: Mark McLoughlin <markmc@redhat.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
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@ -61,6 +61,19 @@
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CFI_UNDEFINED r15
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.endm
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#ifdef CONFIG_PARAVIRT
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ENTRY(native_usergs_sysret32)
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swapgs
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sysretl
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ENDPROC(native_usergs_sysret32)
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ENTRY(native_irq_enable_sysexit)
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swapgs
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sti
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sysexit
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ENDPROC(native_irq_enable_sysexit)
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#endif
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/*
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* 32bit SYSENTER instruction entry.
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*
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@ -151,10 +164,7 @@ sysenter_do_call:
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CFI_ADJUST_CFA_OFFSET -8
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CFI_REGISTER rsp,rcx
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TRACE_IRQS_ON
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swapgs
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sti /* sti only takes effect after the next instruction */
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/* sysexit */
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.byte 0xf, 0x35
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ENABLE_INTERRUPTS_SYSEXIT32
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sysenter_tracesys:
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CFI_RESTORE_STATE
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@ -254,8 +264,7 @@ cstar_do_call:
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TRACE_IRQS_ON
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movl RSP-ARGOFFSET(%rsp),%esp
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CFI_RESTORE rsp
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swapgs
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sysretl
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USERGS_SYSRET32
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cstar_tracesys:
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CFI_RESTORE_STATE
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@ -62,7 +62,9 @@ int main(void)
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OFFSET(PV_IRQ_irq_disable, pv_irq_ops, irq_disable);
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OFFSET(PV_IRQ_irq_enable, pv_irq_ops, irq_enable);
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OFFSET(PV_CPU_iret, pv_cpu_ops, iret);
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OFFSET(PV_CPU_usergs_sysret, pv_cpu_ops, usergs_sysret);
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OFFSET(PV_CPU_usergs_sysret32, pv_cpu_ops, usergs_sysret32);
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OFFSET(PV_CPU_usergs_sysret64, pv_cpu_ops, usergs_sysret64);
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OFFSET(PV_CPU_irq_enable_sysexit, pv_cpu_ops, irq_enable_sysexit);
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OFFSET(PV_CPU_swapgs, pv_cpu_ops, swapgs);
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OFFSET(PV_MMU_read_cr2, pv_mmu_ops, read_cr2);
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#endif
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@ -59,7 +59,7 @@
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#endif
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#ifdef CONFIG_PARAVIRT
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ENTRY(native_usergs_sysret)
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ENTRY(native_usergs_sysret64)
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swapgs
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sysretq
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#endif /* CONFIG_PARAVIRT */
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@ -275,7 +275,7 @@ sysret_check:
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RESTORE_ARGS 0,-ARG_SKIP,1
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/*CFI_REGISTER rflags,r11*/
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movq %gs:pda_oldrsp, %rsp
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USERGS_SYSRET
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USERGS_SYSRET64
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CFI_RESTORE_STATE
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/* Handle reschedules */
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@ -141,7 +141,8 @@ unsigned paravirt_patch_default(u8 type, u16 clobbers, void *insnbuf,
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ret = paravirt_patch_nop();
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else if (type == PARAVIRT_PATCH(pv_cpu_ops.iret) ||
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type == PARAVIRT_PATCH(pv_cpu_ops.irq_enable_sysexit) ||
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type == PARAVIRT_PATCH(pv_cpu_ops.usergs_sysret))
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type == PARAVIRT_PATCH(pv_cpu_ops.usergs_sysret32) ||
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type == PARAVIRT_PATCH(pv_cpu_ops.usergs_sysret64))
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/* If operation requires a jmp, then jmp */
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ret = paravirt_patch_jmp(insnbuf, opfunc, addr, len);
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else
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@ -193,7 +194,8 @@ static void native_flush_tlb_single(unsigned long addr)
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/* These are in entry.S */
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extern void native_iret(void);
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extern void native_irq_enable_sysexit(void);
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extern void native_usergs_sysret(void);
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extern void native_usergs_sysret32(void);
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extern void native_usergs_sysret64(void);
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static int __init print_banner(void)
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{
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@ -329,10 +331,10 @@ struct pv_cpu_ops pv_cpu_ops = {
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.write_idt_entry = native_write_idt_entry,
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.load_sp0 = native_load_sp0,
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#ifdef CONFIG_X86_32
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.irq_enable_sysexit = native_irq_enable_sysexit,
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#else
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.usergs_sysret = native_usergs_sysret,
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#ifdef CONFIG_X86_64
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.usergs_sysret32 = native_usergs_sysret32,
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.usergs_sysret64 = native_usergs_sysret64,
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#endif
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.iret = native_iret,
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.swapgs = native_swapgs,
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@ -14,8 +14,9 @@ DEF_NATIVE(pv_mmu_ops, flush_tlb_single, "invlpg (%rdi)");
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DEF_NATIVE(pv_cpu_ops, clts, "clts");
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DEF_NATIVE(pv_cpu_ops, wbinvd, "wbinvd");
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/* the three commands give us more control to how to return from a syscall */
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DEF_NATIVE(pv_cpu_ops, usergs_sysret, "swapgs; sysretq;");
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DEF_NATIVE(pv_cpu_ops, irq_enable_sysexit, "swapgs; sti; sysexit");
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DEF_NATIVE(pv_cpu_ops, usergs_sysret64, "swapgs; sysretq");
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DEF_NATIVE(pv_cpu_ops, usergs_sysret32, "swapgs; sysretl");
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DEF_NATIVE(pv_cpu_ops, swapgs, "swapgs");
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unsigned native_patch(u8 type, u16 clobbers, void *ibuf,
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@ -35,7 +36,9 @@ unsigned native_patch(u8 type, u16 clobbers, void *ibuf,
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PATCH_SITE(pv_irq_ops, irq_enable);
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PATCH_SITE(pv_irq_ops, irq_disable);
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PATCH_SITE(pv_cpu_ops, iret);
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PATCH_SITE(pv_cpu_ops, usergs_sysret);
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PATCH_SITE(pv_cpu_ops, irq_enable_sysexit);
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PATCH_SITE(pv_cpu_ops, usergs_sysret32);
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PATCH_SITE(pv_cpu_ops, usergs_sysret64);
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PATCH_SITE(pv_cpu_ops, swapgs);
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PATCH_SITE(pv_mmu_ops, read_cr2);
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PATCH_SITE(pv_mmu_ops, read_cr3);
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@ -112,9 +112,17 @@ static inline unsigned long __raw_local_irq_save(void)
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#ifdef CONFIG_X86_64
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#define INTERRUPT_RETURN iretq
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#define USERGS_SYSRET \
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swapgs; \
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sysretq;
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#define USERGS_SYSRET64 \
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swapgs; \
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sysretq;
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#define USERGS_SYSRET32 \
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swapgs; \
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sysretl
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#define ENABLE_INTERRUPTS_SYSEXIT32 \
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swapgs; \
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sti; \
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sysexit
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#else
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#define INTERRUPT_RETURN iret
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#define ENABLE_INTERRUPTS_SYSEXIT sti; sysexit
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@ -141,9 +141,32 @@ struct pv_cpu_ops {
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u64 (*read_pmc)(int counter);
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unsigned long long (*read_tscp)(unsigned int *aux);
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/* These three are jmp to, not actually called. */
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/*
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* Atomically enable interrupts and return to userspace. This
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* is only ever used to return to 32-bit processes; in a
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* 64-bit kernel, it's used for 32-on-64 compat processes, but
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* never native 64-bit processes. (Jump, not call.)
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*/
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void (*irq_enable_sysexit)(void);
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void (*usergs_sysret)(void);
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/*
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* Switch to usermode gs and return to 64-bit usermode using
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* sysret. Only used in 64-bit kernels to return to 64-bit
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* processes. Usermode register state, including %rsp, must
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* already be restored.
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*/
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void (*usergs_sysret64)(void);
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/*
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* Switch to usermode gs and return to 32-bit usermode using
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* sysret. Used to return to 32-on-64 compat processes.
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* Other usermode register state, including %esp, must already
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* be restored.
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*/
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void (*usergs_sysret32)(void);
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/* Normal iret. Jump to this with the standard iret stack
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frame set up. */
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void (*iret)(void);
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void (*swapgs)(void);
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@ -1481,18 +1504,24 @@ static inline unsigned long __raw_local_irq_save(void)
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call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_enable); \
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PV_RESTORE_REGS;)
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#define ENABLE_INTERRUPTS_SYSEXIT \
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PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_irq_enable_sysexit), \
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#define USERGS_SYSRET32 \
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PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_usergs_sysret32), \
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CLBR_NONE, \
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jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_irq_enable_sysexit))
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jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_usergs_sysret32))
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#ifdef CONFIG_X86_32
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#define GET_CR0_INTO_EAX \
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push %ecx; push %edx; \
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call PARA_INDIRECT(pv_cpu_ops+PV_CPU_read_cr0); \
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pop %edx; pop %ecx
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#else
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#define ENABLE_INTERRUPTS_SYSEXIT \
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PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_irq_enable_sysexit), \
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CLBR_NONE, \
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jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_irq_enable_sysexit))
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#else /* !CONFIG_X86_32 */
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#define SWAPGS \
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PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE, \
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PV_SAVE_REGS; \
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movq %rax, %rcx; \
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xorq %rax, %rax;
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#define USERGS_SYSRET \
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PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_usergs_sysret), \
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#define USERGS_SYSRET64 \
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PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_usergs_sysret64), \
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CLBR_NONE, \
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jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_usergs_sysret))
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#endif
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jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_usergs_sysret64))
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#define ENABLE_INTERRUPTS_SYSEXIT32 \
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PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_irq_enable_sysexit), \
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CLBR_NONE, \
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jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_irq_enable_sysexit))
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#endif /* CONFIG_X86_32 */
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#endif /* __ASSEMBLY__ */
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#endif /* CONFIG_PARAVIRT */
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