forked from luck/tmp_suning_uos_patched
nds32: MMU definitions
This patch includes virtual memory layout, PHYS_OFFSET is defined as 0x0. It also includes the 4KB/8KB page size configurations and pte operations. Signed-off-by: Vincent Chen <vincentc@andestech.com> Signed-off-by: Greentime Hu <greentime@andestech.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Greentime Hu
parent
2923f5ea77
commit
2e1aecb970
29
arch/nds32/include/asm/fixmap.h
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29
arch/nds32/include/asm/fixmap.h
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// SPDX-License-Identifier: GPL-2.0
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// Copyright (C) 2005-2017 Andes Technology Corporation
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#ifndef __ASM_NDS32_FIXMAP_H
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#define __ASM_NDS32_FIXMAP_H
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#ifdef CONFIG_HIGHMEM
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#include <linux/threads.h>
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#include <asm/kmap_types.h>
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#endif
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enum fixed_addresses {
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FIX_HOLE,
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FIX_KMAP_RESERVED,
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FIX_KMAP_BEGIN,
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#ifdef CONFIG_HIGHMEM
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FIX_KMAP_END = FIX_KMAP_BEGIN + (KM_TYPE_NR * NR_CPUS),
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#endif
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FIX_EARLYCON_MEM_BASE,
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__end_of_fixed_addresses
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};
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#define FIXADDR_TOP ((unsigned long) (-(16 * PAGE_SIZE)))
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#define FIXADDR_SIZE ((__end_of_fixed_addresses) << PAGE_SHIFT)
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#define FIXADDR_START (FIXADDR_TOP - FIXADDR_SIZE)
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#define FIXMAP_PAGE_IO __pgprot(PAGE_DEVICE)
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void __set_fixmap(enum fixed_addresses idx, phys_addr_t phys, pgprot_t prot);
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#include <asm-generic/fixmap.h>
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#endif /* __ASM_NDS32_FIXMAP_H */
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65
arch/nds32/include/asm/highmem.h
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arch/nds32/include/asm/highmem.h
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// SPDX-License-Identifier: GPL-2.0
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// Copyright (C) 2005-2017 Andes Technology Corporation
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#ifndef _ASM_HIGHMEM_H
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#define _ASM_HIGHMEM_H
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#include <asm/proc-fns.h>
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#include <asm/kmap_types.h>
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#include <asm/fixmap.h>
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#include <asm/pgtable.h>
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/*
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* Right now we initialize only a single pte table. It can be extended
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* easily, subsequent pte tables have to be allocated in one physical
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* chunk of RAM.
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*/
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/*
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* Ordering is (from lower to higher memory addresses):
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*
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* high_memory
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* Persistent kmap area
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* PKMAP_BASE
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* fixed_addresses
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* FIXADDR_START
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* FIXADDR_TOP
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* Vmalloc area
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* VMALLOC_START
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* VMALLOC_END
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*/
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#define PKMAP_BASE ((FIXADDR_START - PGDIR_SIZE) & (PGDIR_MASK))
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#define LAST_PKMAP PTRS_PER_PTE
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#define LAST_PKMAP_MASK (LAST_PKMAP - 1)
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#define PKMAP_NR(virt) (((virt) - (PKMAP_BASE)) >> PAGE_SHIFT)
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#define PKMAP_ADDR(nr) (PKMAP_BASE + ((nr) << PAGE_SHIFT))
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#define kmap_prot PAGE_KERNEL
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static inline void flush_cache_kmaps(void)
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{
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cpu_dcache_wbinval_all();
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}
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/* declarations for highmem.c */
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extern unsigned long highstart_pfn, highend_pfn;
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extern pte_t *pkmap_page_table;
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extern void *kmap_high(struct page *page);
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extern void kunmap_high(struct page *page);
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extern void kmap_init(void);
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/*
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* The following functions are already defined by <linux/highmem.h>
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* when CONFIG_HIGHMEM is not set.
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*/
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#ifdef CONFIG_HIGHMEM
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extern void *kmap(struct page *page);
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extern void kunmap(struct page *page);
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extern void *kmap_atomic(struct page *page);
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extern void __kunmap_atomic(void *kvaddr);
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extern void *kmap_atomic_pfn(unsigned long pfn);
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extern struct page *kmap_atomic_to_page(void *ptr);
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#endif
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#endif
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105
arch/nds32/include/asm/memory.h
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arch/nds32/include/asm/memory.h
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// SPDX-License-Identifier: GPL-2.0
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// Copyright (C) 2005-2017 Andes Technology Corporation
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#ifndef __ASM_NDS32_MEMORY_H
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#define __ASM_NDS32_MEMORY_H
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#include <linux/compiler.h>
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#include <linux/sizes.h>
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#ifndef __ASSEMBLY__
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#include <asm/page.h>
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#endif
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#ifndef PHYS_OFFSET
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#define PHYS_OFFSET (0x0)
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#endif
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#ifndef __virt_to_bus
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#define __virt_to_bus __virt_to_phys
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#endif
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#ifndef __bus_to_virt
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#define __bus_to_virt __phys_to_virt
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#endif
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/*
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* TASK_SIZE - the maximum size of a user space task.
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* TASK_UNMAPPED_BASE - the lower boundary of the mmap VM area
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*/
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#define TASK_SIZE ((CONFIG_PAGE_OFFSET) - (SZ_32M))
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#define TASK_UNMAPPED_BASE ALIGN(TASK_SIZE / 3, SZ_32M)
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#define PAGE_OFFSET (CONFIG_PAGE_OFFSET)
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/*
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* Physical vs virtual RAM address space conversion. These are
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* private definitions which should NOT be used outside memory.h
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* files. Use virt_to_phys/phys_to_virt/__pa/__va instead.
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*/
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#ifndef __virt_to_phys
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#define __virt_to_phys(x) ((x) - PAGE_OFFSET + PHYS_OFFSET)
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#define __phys_to_virt(x) ((x) - PHYS_OFFSET + PAGE_OFFSET)
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#endif
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/*
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* The module space lives between the addresses given by TASK_SIZE
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* and PAGE_OFFSET - it must be within 32MB of the kernel text.
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*/
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#define MODULES_END (PAGE_OFFSET)
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#define MODULES_VADDR (MODULES_END - SZ_32M)
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#if TASK_SIZE > MODULES_VADDR
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#error Top of user space clashes with start of module space
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#endif
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#ifndef __ASSEMBLY__
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/*
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* PFNs are used to describe any physical page; this means
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* PFN 0 == physical address 0.
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*
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* This is the PFN of the first RAM page in the kernel
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* direct-mapped view. We assume this is the first page
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* of RAM in the mem_map as well.
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*/
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#define PHYS_PFN_OFFSET (PHYS_OFFSET >> PAGE_SHIFT)
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/*
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* Drivers should NOT use these either.
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*/
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#define __pa(x) __virt_to_phys((unsigned long)(x))
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#define __va(x) ((void *)__phys_to_virt((unsigned long)(x)))
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/*
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* Conversion between a struct page and a physical address.
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*
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* Note: when converting an unknown physical address to a
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* struct page, the resulting pointer must be validated
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* using VALID_PAGE(). It must return an invalid struct page
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* for any physical address not corresponding to a system
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* RAM address.
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*
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* pfn_valid(pfn) indicates whether a PFN number is valid
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*
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* virt_to_page(k) convert a _valid_ virtual address to struct page *
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* virt_addr_valid(k) indicates whether a virtual address is valid
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*/
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#ifndef CONFIG_DISCONTIGMEM
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#define ARCH_PFN_OFFSET PHYS_PFN_OFFSET
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#define pfn_valid(pfn) ((pfn) >= PHYS_PFN_OFFSET && (pfn) < (PHYS_PFN_OFFSET + max_mapnr))
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#define virt_to_page(kaddr) (pfn_to_page(__pa(kaddr) >> PAGE_SHIFT))
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#define virt_addr_valid(kaddr) ((unsigned long)(kaddr) >= PAGE_OFFSET && (unsigned long)(kaddr) < (unsigned long)high_memory)
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#else /* CONFIG_DISCONTIGMEM */
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#error CONFIG_DISCONTIGMEM is not supported yet.
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#endif /* !CONFIG_DISCONTIGMEM */
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#define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT)
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#endif
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#include <asm-generic/memory_model.h>
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#endif
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12
arch/nds32/include/asm/mmu.h
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arch/nds32/include/asm/mmu.h
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// SPDX-License-Identifier: GPL-2.0
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// Copyright (C) 2005-2017 Andes Technology Corporation
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#ifndef __NDS32_MMU_H
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#define __NDS32_MMU_H
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typedef struct {
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unsigned int id;
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void *vdso;
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} mm_context_t;
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#endif
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67
arch/nds32/include/asm/page.h
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arch/nds32/include/asm/page.h
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/*
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* SPDX-License-Identifier: GPL-2.0
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* Copyright (C) 2005-2017 Andes Technology Corporation
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*/
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#ifndef _ASMNDS32_PAGE_H
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#define _ASMNDS32_PAGE_H
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#ifdef CONFIG_ANDES_PAGE_SIZE_4KB
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#define PAGE_SHIFT 12
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#endif
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#ifdef CONFIG_ANDES_PAGE_SIZE_8KB
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#define PAGE_SHIFT 13
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#endif
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#include <linux/const.h>
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#define PAGE_SIZE (_AC(1,UL) << PAGE_SHIFT)
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#define PAGE_MASK (~(PAGE_SIZE-1))
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#ifdef __KERNEL__
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#ifndef __ASSEMBLY__
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struct page;
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struct vm_area_struct;
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#ifdef CONFIG_CPU_CACHE_ALIASING
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extern void copy_user_highpage(struct page *to, struct page *from,
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unsigned long vaddr, struct vm_area_struct *vma);
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extern void clear_user_highpage(struct page *page, unsigned long vaddr);
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#define __HAVE_ARCH_COPY_USER_HIGHPAGE
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#define clear_user_highpage clear_user_highpage
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#else
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#define clear_user_page(page, vaddr, pg) clear_page(page)
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#define copy_user_page(to, from, vaddr, pg) copy_page(to, from)
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#endif
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void clear_page(void *page);
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void copy_page(void *to, void *from);
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typedef unsigned long pte_t;
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typedef unsigned long pmd_t;
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typedef unsigned long pgd_t;
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typedef unsigned long pgprot_t;
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#define pte_val(x) (x)
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#define pmd_val(x) (x)
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#define pgd_val(x) (x)
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#define pgprot_val(x) (x)
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#define __pte(x) (x)
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#define __pmd(x) (x)
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#define __pgd(x) (x)
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#define __pgprot(x) (x)
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typedef struct page *pgtable_t;
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#include <asm/memory.h>
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#include <asm-generic/getorder.h>
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#endif /* !__ASSEMBLY__ */
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#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \
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VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
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#endif /* __KERNEL__ */
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#endif
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96
arch/nds32/include/asm/pgalloc.h
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arch/nds32/include/asm/pgalloc.h
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// SPDX-License-Identifier: GPL-2.0
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// Copyright (C) 2005-2017 Andes Technology Corporation
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#ifndef _ASMNDS32_PGALLOC_H
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#define _ASMNDS32_PGALLOC_H
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#include <asm/processor.h>
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#include <asm/cacheflush.h>
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#include <asm/tlbflush.h>
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#include <asm/proc-fns.h>
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/*
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* Since we have only two-level page tables, these are trivial
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*/
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#define pmd_alloc_one(mm, addr) ({ BUG(); ((pmd_t *)2); })
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#define pmd_free(mm, pmd) do { } while (0)
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#define pgd_populate(mm, pmd, pte) BUG()
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#define pmd_pgtable(pmd) pmd_page(pmd)
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extern pgd_t *pgd_alloc(struct mm_struct *mm);
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extern void pgd_free(struct mm_struct *mm, pgd_t * pgd);
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#define check_pgt_cache() do { } while (0)
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static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm,
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unsigned long addr)
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{
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pte_t *pte;
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pte =
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(pte_t *) __get_free_page(GFP_KERNEL | __GFP_RETRY_MAYFAIL |
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__GFP_ZERO);
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return pte;
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}
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static inline pgtable_t pte_alloc_one(struct mm_struct *mm, unsigned long addr)
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{
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pgtable_t pte;
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pte = alloc_pages(GFP_KERNEL | __GFP_RETRY_MAYFAIL | __GFP_ZERO, 0);
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if (pte)
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cpu_dcache_wb_page((unsigned long)page_address(pte));
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return pte;
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}
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/*
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* Free one PTE table.
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*/
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static inline void pte_free_kernel(struct mm_struct *mm, pte_t * pte)
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{
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if (pte) {
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free_page((unsigned long)pte);
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}
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}
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static inline void pte_free(struct mm_struct *mm, pgtable_t pte)
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{
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__free_page(pte);
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}
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/*
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* Populate the pmdp entry with a pointer to the pte. This pmd is part
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* of the mm address space.
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*
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* Ensure that we always set both PMD entries.
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*/
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static inline void
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pmd_populate_kernel(struct mm_struct *mm, pmd_t * pmdp, pte_t * ptep)
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{
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unsigned long pte_ptr = (unsigned long)ptep;
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unsigned long pmdval;
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BUG_ON(mm != &init_mm);
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/*
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* The pmd must be loaded with the physical
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* address of the PTE table
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*/
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pmdval = __pa(pte_ptr) | _PAGE_KERNEL_TABLE;
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set_pmd(pmdp, __pmd(pmdval));
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}
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static inline void
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pmd_populate(struct mm_struct *mm, pmd_t * pmdp, pgtable_t ptep)
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{
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unsigned long pmdval;
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BUG_ON(mm == &init_mm);
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pmdval = page_to_pfn(ptep) << PAGE_SHIFT | _PAGE_USER_TABLE;
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set_pmd(pmdp, __pmd(pmdval));
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}
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#endif
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409
arch/nds32/include/asm/pgtable.h
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409
arch/nds32/include/asm/pgtable.h
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// SPDX-License-Identifier: GPL-2.0
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// Copyright (C) 2005-2017 Andes Technology Corporation
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#ifndef _ASMNDS32_PGTABLE_H
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#define _ASMNDS32_PGTABLE_H
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#define __PAGETABLE_PMD_FOLDED
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#include <asm-generic/4level-fixup.h>
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#include <asm-generic/sizes.h>
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#include <asm/memory.h>
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#include <asm/nds32.h>
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#ifndef __ASSEMBLY__
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#include <asm/fixmap.h>
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#include <asm/io.h>
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#include <nds32_intrinsic.h>
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#endif
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#ifdef CONFIG_ANDES_PAGE_SIZE_4KB
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#define PGDIR_SHIFT 22
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#define PTRS_PER_PGD 1024
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#define PMD_SHIFT 22
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#define PTRS_PER_PMD 1
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#define PTRS_PER_PTE 1024
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#endif
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#ifdef CONFIG_ANDES_PAGE_SIZE_8KB
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#define PGDIR_SHIFT 24
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#define PTRS_PER_PGD 256
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#define PMD_SHIFT 24
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#define PTRS_PER_PMD 1
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#define PTRS_PER_PTE 2048
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#endif
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#ifndef __ASSEMBLY__
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extern void __pte_error(const char *file, int line, unsigned long val);
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extern void __pmd_error(const char *file, int line, unsigned long val);
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extern void __pgd_error(const char *file, int line, unsigned long val);
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#define pte_ERROR(pte) __pte_error(__FILE__, __LINE__, pte_val(pte))
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#define pmd_ERROR(pmd) __pmd_error(__FILE__, __LINE__, pmd_val(pmd))
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#define pgd_ERROR(pgd) __pgd_error(__FILE__, __LINE__, pgd_val(pgd))
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#endif /* !__ASSEMBLY__ */
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#define PMD_SIZE (1UL << PMD_SHIFT)
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#define PMD_MASK (~(PMD_SIZE-1))
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#define PGDIR_SIZE (1UL << PGDIR_SHIFT)
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#define PGDIR_MASK (~(PGDIR_SIZE-1))
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/*
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* This is the lowest virtual address we can permit any user space
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* mapping to be mapped at. This is particularly important for
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* non-high vector CPUs.
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*/
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#define FIRST_USER_ADDRESS 0x8000
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#ifdef CONFIG_HIGHMEM
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#define CONSISTENT_BASE ((PKMAP_BASE) - (SZ_2M))
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#define CONSISTENT_END (PKMAP_BASE)
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#else
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#define CONSISTENT_BASE (FIXADDR_START - SZ_2M)
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#define CONSISTENT_END (FIXADDR_START)
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#endif
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#define CONSISTENT_OFFSET(x) (((unsigned long)(x) - CONSISTENT_BASE) >> PAGE_SHIFT)
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#ifdef CONFIG_HIGHMEM
|
||||
#ifndef __ASSEMBLY__
|
||||
#include <asm/highmem.h>
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#define VMALLOC_RESERVE SZ_128M
|
||||
#define VMALLOC_END (CONSISTENT_BASE - PAGE_SIZE)
|
||||
#define VMALLOC_START ((VMALLOC_END) - VMALLOC_RESERVE)
|
||||
#define VMALLOC_VMADDR(x) ((unsigned long)(x))
|
||||
#define MAXMEM __pa(VMALLOC_START)
|
||||
#define MAXMEM_PFN PFN_DOWN(MAXMEM)
|
||||
|
||||
#define FIRST_USER_PGD_NR 0
|
||||
#define USER_PTRS_PER_PGD ((TASK_SIZE/PGDIR_SIZE) + FIRST_USER_PGD_NR)
|
||||
|
||||
/* L2 PTE */
|
||||
#define _PAGE_V (1UL << 0)
|
||||
|
||||
#define _PAGE_M_XKRW (0UL << 1)
|
||||
#define _PAGE_M_UR_KR (1UL << 1)
|
||||
#define _PAGE_M_UR_KRW (2UL << 1)
|
||||
#define _PAGE_M_URW_KRW (3UL << 1)
|
||||
#define _PAGE_M_KR (5UL << 1)
|
||||
#define _PAGE_M_KRW (7UL << 1)
|
||||
|
||||
#define _PAGE_D (1UL << 4)
|
||||
#define _PAGE_E (1UL << 5)
|
||||
#define _PAGE_A (1UL << 6)
|
||||
#define _PAGE_G (1UL << 7)
|
||||
|
||||
#define _PAGE_C_DEV (0UL << 8)
|
||||
#define _PAGE_C_DEV_WB (1UL << 8)
|
||||
#define _PAGE_C_MEM (2UL << 8)
|
||||
#define _PAGE_C_MEM_SHRD_WB (4UL << 8)
|
||||
#define _PAGE_C_MEM_SHRD_WT (5UL << 8)
|
||||
#define _PAGE_C_MEM_WB (6UL << 8)
|
||||
#define _PAGE_C_MEM_WT (7UL << 8)
|
||||
|
||||
#define _PAGE_L (1UL << 11)
|
||||
|
||||
#define _HAVE_PAGE_L (_PAGE_L)
|
||||
#define _PAGE_FILE (1UL << 1)
|
||||
#define _PAGE_YOUNG 0
|
||||
#define _PAGE_M_MASK _PAGE_M_KRW
|
||||
#define _PAGE_C_MASK _PAGE_C_MEM_WT
|
||||
|
||||
#ifdef CONFIG_SMP
|
||||
#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
|
||||
#define _PAGE_CACHE_SHRD _PAGE_C_MEM_SHRD_WT
|
||||
#else
|
||||
#define _PAGE_CACHE_SHRD _PAGE_C_MEM_SHRD_WB
|
||||
#endif
|
||||
#else
|
||||
#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
|
||||
#define _PAGE_CACHE_SHRD _PAGE_C_MEM_WT
|
||||
#else
|
||||
#define _PAGE_CACHE_SHRD _PAGE_C_MEM_WB
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
|
||||
#define _PAGE_CACHE _PAGE_C_MEM_WT
|
||||
#else
|
||||
#define _PAGE_CACHE _PAGE_C_MEM_WB
|
||||
#endif
|
||||
|
||||
/*
|
||||
* + Level 1 descriptor (PMD)
|
||||
*/
|
||||
#define PMD_TYPE_TABLE 0
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
#define _PAGE_USER_TABLE PMD_TYPE_TABLE
|
||||
#define _PAGE_KERNEL_TABLE PMD_TYPE_TABLE
|
||||
|
||||
#define PAGE_EXEC __pgprot(_PAGE_V | _PAGE_M_XKRW | _PAGE_E)
|
||||
#define PAGE_NONE __pgprot(_PAGE_V | _PAGE_M_KRW | _PAGE_A)
|
||||
#define PAGE_READ __pgprot(_PAGE_V | _PAGE_M_UR_KR)
|
||||
#define PAGE_RDWR __pgprot(_PAGE_V | _PAGE_M_URW_KRW | _PAGE_D)
|
||||
#define PAGE_COPY __pgprot(_PAGE_V | _PAGE_M_UR_KR)
|
||||
|
||||
#define PAGE_UXKRWX_V1 __pgprot(_PAGE_V | _PAGE_M_KRW | _PAGE_D | _PAGE_E | _PAGE_G | _PAGE_CACHE_SHRD)
|
||||
#define PAGE_UXKRWX_V2 __pgprot(_PAGE_V | _PAGE_M_XKRW | _PAGE_D | _PAGE_E | _PAGE_G | _PAGE_CACHE_SHRD)
|
||||
#define PAGE_URXKRWX_V2 __pgprot(_PAGE_V | _PAGE_M_UR_KRW | _PAGE_D | _PAGE_E | _PAGE_G | _PAGE_CACHE_SHRD)
|
||||
#define PAGE_CACHE_L1 __pgprot(_HAVE_PAGE_L | _PAGE_V | _PAGE_M_KRW | _PAGE_D | _PAGE_E | _PAGE_G | _PAGE_CACHE)
|
||||
#define PAGE_MEMORY __pgprot(_HAVE_PAGE_L | _PAGE_V | _PAGE_M_KRW | _PAGE_D | _PAGE_E | _PAGE_G | _PAGE_CACHE_SHRD)
|
||||
#define PAGE_KERNEL __pgprot(_PAGE_V | _PAGE_M_KRW | _PAGE_D | _PAGE_E | _PAGE_G | _PAGE_CACHE_SHRD)
|
||||
#define PAGE_DEVICE __pgprot(_PAGE_V | _PAGE_M_KRW | _PAGE_D | _PAGE_G | _PAGE_C_DEV)
|
||||
#endif /* __ASSEMBLY__ */
|
||||
|
||||
/* xwr */
|
||||
#define __P000 (PAGE_NONE | _PAGE_CACHE_SHRD)
|
||||
#define __P001 (PAGE_READ | _PAGE_CACHE_SHRD)
|
||||
#define __P010 (PAGE_COPY | _PAGE_CACHE_SHRD)
|
||||
#define __P011 (PAGE_COPY | _PAGE_CACHE_SHRD)
|
||||
#define __P100 (PAGE_EXEC | _PAGE_CACHE_SHRD)
|
||||
#define __P101 (PAGE_READ | _PAGE_E | _PAGE_CACHE_SHRD)
|
||||
#define __P110 (PAGE_COPY | _PAGE_E | _PAGE_CACHE_SHRD)
|
||||
#define __P111 (PAGE_COPY | _PAGE_E | _PAGE_CACHE_SHRD)
|
||||
|
||||
#define __S000 (PAGE_NONE | _PAGE_CACHE_SHRD)
|
||||
#define __S001 (PAGE_READ | _PAGE_CACHE_SHRD)
|
||||
#define __S010 (PAGE_RDWR | _PAGE_CACHE_SHRD)
|
||||
#define __S011 (PAGE_RDWR | _PAGE_CACHE_SHRD)
|
||||
#define __S100 (PAGE_EXEC | _PAGE_CACHE_SHRD)
|
||||
#define __S101 (PAGE_READ | _PAGE_E | _PAGE_CACHE_SHRD)
|
||||
#define __S110 (PAGE_RDWR | _PAGE_E | _PAGE_CACHE_SHRD)
|
||||
#define __S111 (PAGE_RDWR | _PAGE_E | _PAGE_CACHE_SHRD)
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
/*
|
||||
* ZERO_PAGE is a global shared page that is always zero: used
|
||||
* for zero-mapped memory areas etc..
|
||||
*/
|
||||
extern struct page *empty_zero_page;
|
||||
extern void paging_init(void);
|
||||
#define ZERO_PAGE(vaddr) (empty_zero_page)
|
||||
|
||||
#define pte_pfn(pte) (pte_val(pte) >> PAGE_SHIFT)
|
||||
#define pfn_pte(pfn,prot) (__pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot)))
|
||||
|
||||
#define pte_none(pte) !(pte_val(pte))
|
||||
#define pte_clear(mm,addr,ptep) set_pte_at((mm),(addr),(ptep), __pte(0))
|
||||
#define pte_page(pte) (pfn_to_page(pte_pfn(pte)))
|
||||
|
||||
#define pte_index(address) (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
|
||||
#define pte_offset_kernel(dir, address) ((pte_t *)pmd_page_kernel(*(dir)) + pte_index(address))
|
||||
#define pte_offset_map(dir, address) ((pte_t *)page_address(pmd_page(*(dir))) + pte_index(address))
|
||||
#define pte_offset_map_nested(dir, address) pte_offset_map(dir, address)
|
||||
#define pmd_page_kernel(pmd) ((unsigned long) __va(pmd_val(pmd) & PAGE_MASK))
|
||||
|
||||
#define pte_unmap(pte) do { } while (0)
|
||||
#define pte_unmap_nested(pte) do { } while (0)
|
||||
|
||||
#define pmd_off_k(address) pmd_offset(pgd_offset_k(address), address)
|
||||
|
||||
#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)
|
||||
/*
|
||||
* Set a level 1 translation table entry, and clean it out of
|
||||
* any caches such that the MMUs can load it correctly.
|
||||
*/
|
||||
static inline void set_pmd(pmd_t * pmdp, pmd_t pmd)
|
||||
{
|
||||
|
||||
*pmdp = pmd;
|
||||
#if !defined(CONFIG_CPU_DCACHE_DISABLE) && !defined(CONFIG_CPU_DCACHE_WRITETHROUGH)
|
||||
__asm__ volatile ("\n\tcctl %0, L1D_VA_WB"::"r" (pmdp):"memory");
|
||||
__nds32__msync_all();
|
||||
__nds32__dsb();
|
||||
#endif
|
||||
}
|
||||
|
||||
/*
|
||||
* Set a PTE and flush it out
|
||||
*/
|
||||
static inline void set_pte(pte_t * ptep, pte_t pte)
|
||||
{
|
||||
|
||||
*ptep = pte;
|
||||
#if !defined(CONFIG_CPU_DCACHE_DISABLE) && !defined(CONFIG_CPU_DCACHE_WRITETHROUGH)
|
||||
__asm__ volatile ("\n\tcctl %0, L1D_VA_WB"::"r" (ptep):"memory");
|
||||
__nds32__msync_all();
|
||||
__nds32__dsb();
|
||||
#endif
|
||||
}
|
||||
|
||||
/*
|
||||
* The following only work if pte_present() is true.
|
||||
* Undefined behaviour if not..
|
||||
*/
|
||||
|
||||
/*
|
||||
* pte_write: this page is writeable for user mode
|
||||
* pte_read: this page is readable for user mode
|
||||
* pte_kernel_write: this page is writeable for kernel mode
|
||||
*
|
||||
* We don't have pte_kernel_read because kernel always can read.
|
||||
*
|
||||
* */
|
||||
|
||||
#define pte_present(pte) (pte_val(pte) & _PAGE_V)
|
||||
#define pte_write(pte) ((pte_val(pte) & _PAGE_M_MASK) == _PAGE_M_URW_KRW)
|
||||
#define pte_read(pte) (((pte_val(pte) & _PAGE_M_MASK) == _PAGE_M_UR_KR) || \
|
||||
((pte_val(pte) & _PAGE_M_MASK) == _PAGE_M_UR_KRW) || \
|
||||
((pte_val(pte) & _PAGE_M_MASK) == _PAGE_M_URW_KRW))
|
||||
#define pte_kernel_write(pte) (((pte_val(pte) & _PAGE_M_MASK) == _PAGE_M_URW_KRW) || \
|
||||
((pte_val(pte) & _PAGE_M_MASK) == _PAGE_M_UR_KRW) || \
|
||||
((pte_val(pte) & _PAGE_M_MASK) == _PAGE_M_KRW) || \
|
||||
(((pte_val(pte) & _PAGE_M_MASK) == _PAGE_M_XKRW) && pte_exec(pte)))
|
||||
#define pte_exec(pte) (pte_val(pte) & _PAGE_E)
|
||||
#define pte_dirty(pte) (pte_val(pte) & _PAGE_D)
|
||||
#define pte_young(pte) (pte_val(pte) & _PAGE_YOUNG)
|
||||
|
||||
/*
|
||||
* The following only works if pte_present() is not true.
|
||||
*/
|
||||
#define pte_file(pte) (pte_val(pte) & _PAGE_FILE)
|
||||
#define pte_to_pgoff(x) (pte_val(x) >> 2)
|
||||
#define pgoff_to_pte(x) __pte(((x) << 2) | _PAGE_FILE)
|
||||
|
||||
#define PTE_FILE_MAX_BITS 29
|
||||
|
||||
#define PTE_BIT_FUNC(fn,op) \
|
||||
static inline pte_t pte_##fn(pte_t pte) { pte_val(pte) op; return pte; }
|
||||
|
||||
static inline pte_t pte_wrprotect(pte_t pte)
|
||||
{
|
||||
pte_val(pte) = pte_val(pte) & ~_PAGE_M_MASK;
|
||||
pte_val(pte) = pte_val(pte) | _PAGE_M_UR_KR;
|
||||
return pte;
|
||||
}
|
||||
|
||||
static inline pte_t pte_mkwrite(pte_t pte)
|
||||
{
|
||||
pte_val(pte) = pte_val(pte) & ~_PAGE_M_MASK;
|
||||
pte_val(pte) = pte_val(pte) | _PAGE_M_URW_KRW;
|
||||
return pte;
|
||||
}
|
||||
|
||||
PTE_BIT_FUNC(exprotect, &=~_PAGE_E);
|
||||
PTE_BIT_FUNC(mkexec, |=_PAGE_E);
|
||||
PTE_BIT_FUNC(mkclean, &=~_PAGE_D);
|
||||
PTE_BIT_FUNC(mkdirty, |=_PAGE_D);
|
||||
PTE_BIT_FUNC(mkold, &=~_PAGE_YOUNG);
|
||||
PTE_BIT_FUNC(mkyoung, |=_PAGE_YOUNG);
|
||||
static inline int pte_special(pte_t pte)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static inline pte_t pte_mkspecial(pte_t pte)
|
||||
{
|
||||
return pte;
|
||||
}
|
||||
|
||||
/*
|
||||
* Mark the prot value as uncacheable and unbufferable.
|
||||
*/
|
||||
#define pgprot_noncached(prot) __pgprot((pgprot_val(prot)&~_PAGE_C_MASK) | _PAGE_C_DEV)
|
||||
#define pgprot_writecombine(prot) __pgprot((pgprot_val(prot)&~_PAGE_C_MASK) | _PAGE_C_DEV_WB)
|
||||
|
||||
#define pmd_none(pmd) (pmd_val(pmd)&0x1)
|
||||
#define pmd_present(pmd) (!pmd_none(pmd))
|
||||
#define pmd_bad(pmd) pmd_none(pmd)
|
||||
|
||||
#define copy_pmd(pmdpd,pmdps) set_pmd((pmdpd), *(pmdps))
|
||||
#define pmd_clear(pmdp) set_pmd((pmdp), __pmd(1))
|
||||
|
||||
static inline pmd_t __mk_pmd(pte_t * ptep, unsigned long prot)
|
||||
{
|
||||
unsigned long ptr = (unsigned long)ptep;
|
||||
pmd_t pmd;
|
||||
|
||||
/*
|
||||
* The pmd must be loaded with the physical
|
||||
* address of the PTE table
|
||||
*/
|
||||
|
||||
pmd_val(pmd) = __virt_to_phys(ptr) | prot;
|
||||
return pmd;
|
||||
}
|
||||
|
||||
#define pmd_page(pmd) virt_to_page(__va(pmd_val(pmd)))
|
||||
|
||||
/*
|
||||
* Permanent address of a page. We never have highmem, so this is trivial.
|
||||
*/
|
||||
#define pages_to_mb(x) ((x) >> (20 - PAGE_SHIFT))
|
||||
|
||||
/*
|
||||
* Conversion functions: convert a page and protection to a page entry,
|
||||
* and a page entry and page directory to the page they refer to.
|
||||
*/
|
||||
#define mk_pte(page,prot) pfn_pte(page_to_pfn(page),prot)
|
||||
|
||||
/*
|
||||
* The "pgd_xxx()" functions here are trivial for a folded two-level
|
||||
* setup: the pgd is never bad, and a pmd always exists (as it's folded
|
||||
* into the pgd entry)
|
||||
*/
|
||||
#define pgd_none(pgd) (0)
|
||||
#define pgd_bad(pgd) (0)
|
||||
#define pgd_present(pgd) (1)
|
||||
#define pgd_clear(pgdp) do { } while (0)
|
||||
|
||||
#define page_pte_prot(page,prot) mk_pte(page, prot)
|
||||
#define page_pte(page) mk_pte(page, __pgprot(0))
|
||||
/*
|
||||
* L1PTE = $mr1 + ((virt >> PMD_SHIFT) << 2);
|
||||
* L2PTE = (((virt >> PAGE_SHIFT) & (PTRS_PER_PTE -1 )) << 2);
|
||||
* PPN = (phys & 0xfffff000);
|
||||
*
|
||||
*/
|
||||
|
||||
/* to find an entry in a page-table-directory */
|
||||
#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
|
||||
#define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address))
|
||||
/* to find an entry in a kernel page-table-directory */
|
||||
#define pgd_offset_k(addr) pgd_offset(&init_mm, addr)
|
||||
|
||||
/* Find an entry in the second-level page table.. */
|
||||
#define pmd_offset(dir, addr) ((pmd_t *)(dir))
|
||||
|
||||
static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
|
||||
{
|
||||
const unsigned long mask = 0xfff;
|
||||
pte_val(pte) = (pte_val(pte) & ~mask) | (pgprot_val(newprot) & mask);
|
||||
return pte;
|
||||
}
|
||||
|
||||
extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
|
||||
|
||||
/* Encode and decode a swap entry.
|
||||
*
|
||||
* We support up to 32GB of swap on 4k machines
|
||||
*/
|
||||
#define __swp_type(x) (((x).val >> 2) & 0x7f)
|
||||
#define __swp_offset(x) ((x).val >> 9)
|
||||
#define __swp_entry(type,offset) ((swp_entry_t) { ((type) << 2) | ((offset) << 9) })
|
||||
#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
|
||||
#define __swp_entry_to_pte(swp) ((pte_t) { (swp).val })
|
||||
|
||||
/* Needs to be defined here and not in linux/mm.h, as it is arch dependent */
|
||||
#define kern_addr_valid(addr) (1)
|
||||
|
||||
#include <asm-generic/pgtable.h>
|
||||
|
||||
/*
|
||||
* We provide our own arch_get_unmapped_area to cope with VIPT caches.
|
||||
*/
|
||||
#define HAVE_ARCH_UNMAPPED_AREA
|
||||
|
||||
/*
|
||||
* remap a physical address `phys' of size `size' with page protection `prot'
|
||||
* into virtual address `from'
|
||||
*/
|
||||
|
||||
#define pgtable_cache_init() do { } while (0)
|
||||
|
||||
#endif /* !__ASSEMBLY__ */
|
||||
|
||||
#endif /* _ASMNDS32_PGTABLE_H */
|
||||
19
arch/nds32/include/asm/shmparam.h
Normal file
19
arch/nds32/include/asm/shmparam.h
Normal file
|
|
@ -0,0 +1,19 @@
|
|||
// SPDX-License-Identifier: GPL-2.0
|
||||
// Copyright (C) 2005-2017 Andes Technology Corporation
|
||||
|
||||
#ifndef _ASMNDS32_SHMPARAM_H
|
||||
#define _ASMNDS32_SHMPARAM_H
|
||||
|
||||
/*
|
||||
* This should be the size of the virtually indexed cache/ways,
|
||||
* whichever is greater since the cache aliases every size/ways
|
||||
* bytes.
|
||||
*/
|
||||
#define SHMLBA (4 * SZ_8K) /* attach addr a multiple of this */
|
||||
|
||||
/*
|
||||
* Enforce SHMLBA in shmat
|
||||
*/
|
||||
#define __ARCH_FORCE_SHMLBA
|
||||
|
||||
#endif /* _ASMNDS32_SHMPARAM_H */
|
||||
Loading…
Reference in New Issue
Block a user